SU750720A1 - Single pulse digital registering device - Google Patents

Description

va. at. it has a switching device, a trigger trigger, an AND circuit, a clock pulse and a trigger trigger are connected to one of the inputs, a count input connected to the control unit and a control unit reset output, a trigger trigger, is connected to the output The input of the switching device is connected to the control unit, and the output is connected to the power supply circuits of the units.

The drawing shows a block diagram of the proposed device.

The digital single-pulse recorder contains a series-connected sensor 1, an amplitude analyzer 2 consisting of a comparison circuit 3 and an encoder 4 covered by feedback, a memory device 5 to which a counter 7 is connected to the write inhibit input through the control unit b. also contains a clock pulse generator 8 connected to an encoder 4 and a master oscillator 9 and a power supply unit 10 connected to a memory device 5 and a control unit 6. Moreover, the digital recorder is single x shock pulses is provided with a trigger 11 connected to the AND 12 circuit, one of the inputs of which is connected to a clock pulse generator 8, and an output 7 connected to the output of the control 6 is connected to it. W trigger trigger 1 other input connected start connected to the output of the comparison circuit 3, the switching device GZ is connected with the circuit And 12. The inputs of the switching device 13 are connected to the control unit 6 and to the power supply 14 of the sensor 1 ,. comparison circuits 3, encoder 4, counter 7, clock pulse generator 8, generator 9, trigger trigger 11, circuit I 1; 2, -:

The device works as follows.

In the registration process, a single pulse from sensor 1 is fed to the input of the comparison circuit 3 of the amplitude analyzer 2 and changes its state when it exceeds the initial threshold level, which is created by feedback from the encoder 4.

the information from the comparison circuit 3 is fed to the encoder 4, where it is encoded and fed to the storage device 5. At the same time, its output signal compares the circuit 3 changes the starting trigger trigger 11. At the same time, through the ICEM circuit 12. pulses from the master oscillator 9 through a clock pulse generator 8 is fed to a counter 7, which sends to the memory device 5 a control signal to select an address and record at the selected address the measurement result code.

The operation of the recorder in this mode lasts until the end of the registration signal from the counter 7 to the control unit b, which in turn sends a write inhibit signal to the memory 5 and to the control input of the switching device 13. The switching device 13 turns off the circuit power 14 of all blocks except memory 5 and control unit b.

The memory size of the memory device 5 and the frequency of the series of the generator of clock pulses 8 are selected based on the permissible quantization frequency with respect to the time and accuracy of the registration of pulses.

Such an embodiment of the device allows reducing power consumption by 35-40%.

In addition, switching off the blocks in the data storage mode also reduces energy consumption, which is especially important for onboard equipment,

Claims (2)

1. Authors certificate of the USSR 478999, cl. G 01 d 5/56, .1975. 2. The author's certificate of the USSR 407237, Clo G 01 R 13/02, 1973 (prototype).