SU748757A1 - Thyristorized electric drive control device - Google Patents

Description

The invention relates to electromechanics and can be used in control systems for reversible electric drives with thyristor pulse width transducers. There are known devices for electrically driven ejection: ODD of a high-current with thyristor pulse-width converters, containing a master oscillator, a saw-tooth voltage generator, pulse-width modulators, and forced switching nodes 1.1 j. Such devices provide a certain constant law of control of the pulse-width modulators, with KOR, it is impossible to ensure high dynamic performance of the electric drive. The closest to the invention to the technical essence is a device for controlling thyristor elektieafe i., Containing a series-connected master oscillator, a saw-tooth voltage generator and a lattice-like pulse modulators, as well as two forces of forced switching, the input of one of which is connected to the master output generator, speed sensor, adder and logic unit switching the law of switching. This device implements the commutative switching law of the reverse triac torpul- sine-pulse-drive converter: asymmetrical in the motor mode of operation of the electric motor powered by the converter, i.e., in 1 and AND quadrants of the phase plane of the parameters rf and D (oo1 is the rotation speed motor current), and symmetric in braking mode, i.e., in P and IV quadrants 2.. The disadvantage of this device is the operation of the converter with a symmetric switching law (i.e. with increased 1 and pulsations Single and additional lossy electric power) in the entire region 11 and 1U quadrants.

The purpose of the invention is to increase the energy performance in the braking mode.

The goal is achieved by the fact that the device for controlling the thyristor electric drive is equipped with a current sensor, and the logical block of switching the switching law is performed on two-relay elements, for example, static triggers, three Logic elements AND, two logical elements NOT and one OR element, OR the input of the first relay element is connected to the output of the adder, the output of its No. is connected to the first input of the first logical element AND and simultaneously through the first logical element is NOT connected to the first input m of the second logical element I, the input of the second relay element is connected via an additional adder with the outputs of the speed sensor and the current sensor, its output is connected to the second input of the second logical element AND and simultaneously through the second logic element is NOT connected to the second input of the first logical element AND, and in | The inputs of the first and second logical elements AND are connected respectively to the first and second inputs of an OR logic element, the output of which is connected via the third logical element AND to another input of which the master oscillator output is connected to the input of the second forced switching node.

The essence of the invention is to replace the symmetric switching law with an asymmetrical one in those limited areas of II and IV quadrants, where it allows the converter-motor to be regulated by the system. At the same time, the Transition from the symmetric law of commutation to asymmetrical production;

 .

where GD is the rotational speed of 9 ectr - engines in relative

units;

D is the electric motor core circuit current in relative units.

FIG. 1 is a block diagram of a device for controlling a thyristor electric drive; in fig. 2 - the mechanical characteristics of the motor for motor n braking modes.

The device contains a master Göner torus 1 (Fig. 1), a sawtooth voltage generator 2, pulse-width modulators 3 and 4, nodes 5 and 6 of field-switching, an amplifier 7 of direct current, relay elements 8 and 9, which are symmetrical - triggers, current sensor 10, speed sensor 11, logic elements 12, 13 and 14 AND, logic elements 15 and 16 NOT, logic element 17 OR, adders 18, and 19.

The device for controlling the thyristor drive operates as follows.

Claims (2)

Depending on the polarity of the voltage removed from the DC amplifier 7, pulse-width modulators 3 and 4 operate, which include the power thyristors of the power converter. In the motor mode, only one forced switching node operates, due to which the asymmetrical switching law is realized. For example, if the pulse-width modulator 4 is in operation, from the output of the trigger 8, the unit goes to the logical element 13 AND to the logical element 16 NOT, and from the output of the element 16 NOT to the logical elv; - moment 14 And the zero arrives. The current sensor 10 and the 11-sensor sensor produce a decision control oo + 1 o. During the operation of the modulator 4, the signal fed to the trigger 9 causes a unit at its output, i.e., from the output of the trigger 9 to the input of the logic element 14 And logical element 15 does not receive one. From the output of the element 15 is NOT to the input of the logic element 13 and the input is zero. In this case, there is no match at the inputs of the logic elements 13 AND 14, therefore, from the outputs of elements 13 and 14 AND, the inputs of the logic element 17 OR arrive zeros. On the logical element 12 And from the master oscillator 1 enters one, and from the logical element 17 OR comes zero. From the output of the logical element. 12 And the zero potential arrives at the input of the forced switching node 6, so it does not start. When working in a device for y1T; controlling the electric drive of one node 5 of forced commutation, an asymmetrical switching law is ensured. When the voltage polarity changes, the trigger 8 switches and the zero potential does NOT begin to flow to the input of the element 16. C. The output of element 16 is NOT to the input of logic element 14 And one will come, and from the output of trigger 9, still the input of logical element 14 And one will be received, since the speed of the power engine cannot instantly change its magnitude. Therefore, at the input of the logic element 14 And a coincidence will occur from the output of the logic element 14 AND to the input of the logic element 17 OR one will begin to flow. Both inputs of the logical element 12 I (from the master oscillator 1 and from element 17 OR units are received, therefore, from the output of element 12 I, a unit arrives at the input of the forced switching unit 6, as a result of which it is started. When two nodes are working. 5 and 6 forced switching device to control the elec- tricity provides a symmetrical law of commutation. As the motor reduces speed to such a magnitude that the viMap signal coming from current sensors 10 and 11 changes its sign, trigger 9 switches from its output to Zero will arrive at logical element 14 And, as a result, there will be no coincidence at the inputs of logical elements 13 and 14 I. As a result, both inputs of logical element 17 OR zeros will start to flow, which will cause the switching commutation node 6 to turn off. the electric drive will again start working with one forced switching unit 5, therefore, asymmetric switching law will be ensured. :. Thus, in the proposed device, the switching law of the thyristors of the converter is changed depending on the mode of operation of the electric drive. Claim of the Invention comm-tacni, the input of each of which is connected to the JK output of the master oscillator, speed sensor, adder and logical switching of the law of comm tacies, different; that, in order to increase the energy performance in braking modes of operation, it is equipped with a current sensor, and the logic switching unit of the switching law is performed on two relay elements, such as static triggers, three AND gates, two logical elements, and one logical element OR, In this case, the input of the first relay element is connected to the output of the summator, its output is connected to the first input of the first yoga element AND, and simultaneously through the first logic element is NOT connected to the first input of the second lo And, the input of the second relay element is connected through an additional adder with the outputs of the speed sensor and the current sensor, its output is connected to the second input of the second logical element AND and simultaneously through the second logic element is NOT connected to the second input of the first logical element And, and the outputs the first and second logical elements AND are connected respectively to the first and second inputs of the logical element OR, the output of which through the third logical element AND, to another input of which the output is connected specifies his generator. connected to the input of the forced switching node. Sources of information taken into account during the examination 1. M. Golts et al. Automated DC Drives with Pulse Width Converters, / Energy, 1972, p. 78, 79. 2. USSR author's certificate No. 603078, cl. H 02 P 5/16, 1972.