SU748420A1 - Device for shaping diagnostical test and diagnosis of combination circuits - Google Patents

Description

a valid scheme and fixing sets on which these values differ. .

The goal is achieved by the fact that the device contains a series-connected decoder, a fourth cog / switch and an encoder, as well as elements AND, the first inputs of which are connected to the corresponding outputs of the second and third switches, the second inputs - to the first outputs of the first switch, and the outputs to the second the inputs of the corresponding key elements, the output of each of which is connected to the output of one of the other key elements, and with one of the decoder inputs, the second outputs of the first switch are connected to the inputs of the second About the third switch, and the third exit to the second input of the fourth switch connected to the first input of the comparison unit and the memory with indication, the second input of which is connected to the fourth output of the first switch.

The device implements an algorithm for constructing complete diagnostic test kits, combinational circuits, based on the construction of a direct and inverse control or equivalent normal form of PCFN and ICNF for each conjunction, and tested one set of discontinuity and shunting sets. , :

The block diagram of the device shown in the drawing.

It contains a power supply unit 1, a control unit 2, a first switch 3, a memory comparison unit 4 with indication of the second and third switches 5 and 6, elements 7 AND, key elements 8, decoder 9, fourth switch 10, encoder 11 and diagnosed circuit 12 .

The control unit 2 serves to supply the voltage of the unit 1 to the input of the switch 3, to the unit 4 to fix the failed kits and to control the operation of the switch 3.

Switch 3 is designed to supply the voltage to the buses of switches 5 and 6 and to the inputs of elements 7 I. Power supply to one of the input buses of switch 5 (6) together with all the input buses of switch b (5). Simultaneously with the supply of power to any of the buses of the switch 5 (b), power is supplied to the inputs of all elements .7 And, standing in the output circuits of the switch 5 (6). The power to the first switch 3 is supplied through the zero (initial) position of the switch 10.

Unit 4 contains the sensitive elements of the number of SrMnShy-1-output: gnals circuit 12 and switch 10,

and also contains sets of memory elements and indicating elements.

The memory elements and the indicating elements are divided into two groups. One group fixes the unbeaten. Gap sets, the friend of the non-past shunting kits. With a test command. An element that has a gap, both in the absence of a signal from circuit 12 and in a test command that detects the shunting of elements, and in the presence of a signal from the output of circuit 12, the memory element of block 4 and the indicating element are activated.

Switches 5 and b are intended for switching the variables of the direct and inverse control normal forms of the function, respectively.

Switches 5 and b are made of matrix. Matrix switches use the principle of two-wire logic. Their switching elements, for example, single-pole switches, correspond to variables of a logic function and its inversion. All switching elements, combined with one input bus, correspond to variables of one conjunction of PKNF or TFSC. Switches 5 and b have one group of output tires.

Elements 7 And are multipoles with two inputs and one output (made according to the standard type). One input of element 7 I is supplied with voltage from switch 3, and to the other input from one of the outputs of switch 5 or b.

Elements 8, which are located in the output circuits of one of the switches 5 and b, are connected by control inputs to the outputs of the corresponding elements 7 AND connected to the outputs of another switch 5 or b, and their outputs are connected to the inputs of the decoder 9. The decoder 9 is complete, for example, matrix and serves to convert the binary code at the input in terms of the states of the PCPF and PCPF variables into signals corresponding to the state of the input variables of the circuit.

The switch 10 serves to control the operation of the sensitive, e. breaks to the single position, breaks the power supply circuit of the switch 3, which remains in the disconnected position until the switch 10 arrives at the O position, and together with the encoder 11, made, for example, with a matrix, serves to serially convert the signals at the output of the decoder 9 to binary codes supplied in the form of test cases to the inputs of the circuit 12, (selects all physically realizable sets from each output set of the decoder 9).

The device works as follows.

In the initial position it is secured, all the switching elements are in the off position. Control disjunctive, normal forms of the logical function and its inversions are determined. The switching elements of switches 5 and b, which have the same output buses, are mapped to PCFN and ICPP variables, while the same name variables are mapped to two rows of switching elements, and one of which runs on one output bus, corresponds to variables without inversion, and the other variable with inversion. The variables of the same name are understood here as PCF and ECF, corresponding to one simple path from the input of the diagnosed circuit to its output (for contact circuits, the contacts of the same relay). At the same time, the outputs of the encoder 11 are mapped to the control inputs of the circuit 12 and the device is connected to the inputs and output of the circuit 12.

 The information about the circuit 12 in the form of a direct control disjunctive normal form of the function is entered into the device using the switching elements of the switch 5, and in the form of an inverse control disjunctive. the normal form of the function - by means of switching elements of the switch 6. Using the control unit 2, the power supply voltage is applied; the power supply i to the switch 3 and the power supply unit 4 also starts the power supply of the power switch 3. To generate break sets in each position of the switch 3, the power supply of the power supply 2 to one of the input buses of switch 5, corresponding to the processed conjunction, with all the input buses of switch 6, as well as to elements 7 AND connected to the outputs of switch 5. The output signal from elements 7 AND goes to the control inputs dy of elements 8 connected to switch b to close the output KoiviMyTaTopa tires b, corresponding to the conjunction variables being processed at that moment in switch 5. Elements 7 AND connected to the output of switch 6 are not energized, i.e. . no signal is output from the outputs of these elements. Through the switching elements of the switch 5, the inputs of the decoder 9 are supplied with control actions corresponding to the PCF conjunctions. Through the switching elements of the switch 6, the received test commands are supplemented with the other variables with their states from the CCFR. Since for newer circuits the resulting test suites can be contradictory, i.e. contain the same

if the variables are with opposite states, then these test sets are fed to the inputs of the decoder 9, which converts the binary ride code into a signal at the corresponding outputs. Switch 10 is included in the operation, which provides control actions to the sensitive elements of unit 4. In the presence of a malfunction resulting in the absence of a signal at the output of circuit 12 on the break set, the sensitive element of unit 4 will remember through the corresponding position of the display element and the memory element and will highlight the number of the past

5 test set break.

In order to generate shunting sets in each position of switch 3, the voltage of unit 2 is applied to one of the input buses of the switch, together with all the input buses of switch 5, as well as to elements 7 And connected to the outputs of the switch b. The output signal from the elements 7 and goes to the control inputs of the elements 8, connected to the switch 5, to close them. The elements 7 And connected to the output of the switch 5, the voltage is not supplied, the outputs of these elements signals are not received.

Through the switching elements of the switch b, the inputs of the decoder 9 are supplied with control actions corresponding to the ECTF conjunction variables.

Through commuting elements

5 of the switch 5, the received test commands are supplemented with the remaining variables with their state from the PCPF.

Further, the operation of the device is similar to its work in developing and testing a set of discontinuity.

The advantage of the device over the known ones is that it allows the construction of a test for detecting the fault location for both non-repetitive and repeated combinational circuits based on the automatically generated full diagnostic test.

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Claims (2)

Invention Formula A device for constructing a diagnostic test and diagnostics55 of combinational circuits containing a comparison unit and a memory with an indication and a series-connected power supply unit, a control unit and the first switch, as well as a second The 60 and third switches, the outputs of which are connected to the first inputs of the corresponding key elements, are distinguished by the fact that, in order to expand the functional capabilities of the device, it contains serially connected decryptor, fourth switch and cipher-. TtSp, as well as elements And, the first inputs of which are connected; to the corresponding outputs of the second and third switches, the second inputs to the first outputs of the first switch, and the outputs to the second inputs of the respective key elements, the output of each of which is connected to the output of one of the other key elements and one of the decoder inputs, the second outputs of the first the switch is connected to the inputs of the second and third switches, and tre7484208 The third output is connected to the second input of the fourth switch, connected by the second output to the first input of the comparison unit and the memory with indication, the second input of which is connected to the fourth output of the first switch. Sources of information taken into account in the examination1. US patent No. 3614608, cl. 324-73, published. 12.05.70. 2. USSR author's certificate No. 526834, cl. G 06 F 11/00, 1974 (prototype). . -,  / g -te