SU746858A1 - Device for descrete control of a multiphase pulse-width converter - Google Patents

Description

The invention relates to devices for controlling pulse-width converters of direct current.

Known control devices, built on a discrete principle, contain a master oscillator, clock ^{1 * * * 5} pulse counters, decoders, reversible control counters and the control unit And and [2].

However, these control devices have a large number of clock and reverse counters, which is equal to the number of phases of the multiphase converter, which reduces the reliability of the device, increases its weight, dimensions, cost, power consumption and efficiency.

The closest to the invention, the technical solution is the device for discrete control multiphase PWM impulBsnym transformations _m tar paper DC, comprising a master oscillator, clock and down counters, which number equals the number of inverter phases decoders, yn equals block coordinating element I- .

However, this device also contains a number of clock and reverse counters, which is equal to the number of phases of the multiphase converter. This leads to a decrease in the reliability of the device, to an increase in weight, dimensions, cost and power consumption.

The aim of the invention is to increase the reliability of the device for discrete control of multiphase pulse-width converters.

This goal is achieved by the fact that the device for discrete control is equipped with a decoder of non-movable sequences of pulses, while the clock pulse counter with output buses is connected to the inputs of the decoder of non-movable sequences of control pulses, as well as to the inputs of the decoders of each phase, with the other inputs of which the outputs are connected reversible control counter.

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In FIG. 1 is a schematic diagram of a device for discrete control of a multiphase pulse-width converter ·, in FIG. 2 timing diagrams of the operation of the elements of the device.

The control device (FIG. 1) contains a master oscillator 1, which is a relaxation oscillator, for example a multivibrator, which is connected to a clock pulse counter 2, which is a binary counter that is output. the buses are connected to a decoder 3 of non-shiftable sequences of control pulses made in the form of a diode matrix, the clock pulse counter is connected by output buses to the inputs of decoders 4-7 of each phase, to the other inputs of which are connected the output buses of the reverse control counter 8, the set and return buses connected to the control unit 9, which is made in the form of a hand control panel or in the form of an automatic control unit, as well as output buses 10 - 17.

From the master oscillator 1 with the accepted frequency

Mr ² * (1) r 1 where ± p = ψ is the switching frequency of power thyristors (main);

ΠΊ - the number of triggers of the clock pulse counter;

T is the pulse repetition period; pulses arrive at the clock counter 2, which lead to a change in the status of the trigger counter. from the outputs of the pulse counter 2, the number of which is 2 m, the pulses go to the decoder 3. At the same time, from the output buses 1013 of the decoder 3 an unshifted pulse sequence with a frequency £ p is fed to the amplifiers of the main thyristors of the converter, and the diodes of the matrix of the decoder 3 are selected so that pulses coming from buses 1013 are offset in time relative to each other by 1/4 T (figure 2).

Simultaneously with the outputs of the counter 2 pulses are fed to the corresponding inputs of the decoders 4-7 of each phase. transducer.

To carry out a set of positions from the control unit 9 via the bus of a set of positions, the signals are fed to a reversible counter 8, which transfers the triggers to the corresponding state

4 counters. From the outputs of the counter 8 pulses are fed to other inputs of the decoders 4-7. With the coincidence of the states of the triggers of the clock counter 2 and the states of the triggers of the counter 8, the corresponding diodes of the diode arrays of the decoders are closed and pulses with a frequency of operation appear at the outputs 14 - .1.7 of the decoders 4 - 7. the thyristors of the converter going to the switching thyristors displaced relative to each other by 1/4 T and shifted by.-S ’(figure 2) relative to the corresponding pulses from the outputs 10 - 13 to the main thyristors of the converter.

The offset of the shifted pulse sequences relative to each other by 1/4 T is provided by the fact that the diode arrays of the decoders 4-7, which are connected to the output buses of the counter 8, are typed on all decoders equally, and the diode arrays of the decoders 4-7, which are connected to the output buses the clock pulse counter, offset from each other by 90 in time.

When the second signal arrives from block 9 via the position set bus, the counter 8 changes its state, the latter leads to the fact that, when the triggers of the counters 8 and 2 coincide, the pulses traveling along the output buses 14 - 17 will be shifted relative to the corresponding pulses traveling along output buses 10 - 13, already at 2 8, which leads to an increase in voltage.

As subsequent pulses arrive from the control unit 9 via the position set bus to the reversible control counter 8, a further time shift of the pulses coming from the output buses 14-17 relative to the pulses coming from the corresponding buses 10-13 to the value N occurs.

If it is necessary to return positions from the control unit 9, a signal is sent to the reversible control counter 8 via the position return bus, which leads to the subtraction operation. The operation of the device in this case occurs in a similar way, while the shift of the pulses in time coming from the outputs 14 to 17, relative to the corresponding pulses coming from the outputs 10 to 13, decreases as the signals from the control unit 9 arrive.

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Thus, in the proposed device, the dimensions, weight and cost are reduced, as well as reliability and efficiency are improved without compromising the adjusting properties of the device., ₅

Claims (3)

37 In FIG. 1 shows a transfer diagram of a device for discrete control of a multi-phase pulse-width converter, FIG. 2 timing diagram of the operation of the elements of the device. The control device (Fig.1) contains a master oscillator 1, which is a relaxation oscillator, for example, a multivibrator, which is connected to a pulse counter 2, which is a binary counter, which is output. the tires are connected to the decoder 3 non-jumbled sequences of control pulses made in the form of a diode matrix; the clock pulse counter is connected by output buses to the inputs of the decoders 4-7 of each phase, to the other inputs of which are connected the output buses of the reverse control counter 8, set and return tires. connected to the control unit 9, which is made in the form of a manual control panel or in the form of an automatic control unit, as well as output buses 10-17. From the master oscillator 1 with the received frequency (1) where 1 p is the switching frequency of the power thyristors (main gp is the number of triggers of the clock pulse counter; T is the period of the pulse following pulses arrive at the clock counter 2, which leads to a change in the states of the triggers counter pulses 2, the number of which is 2 W, the pulses follow to the decoder 3. At the same time, from the output bus 10 13 of the decoder 3, the pulse sequence with frequency f is fed to the amplifiers of the main thyristors of the converter, it diodes matrix desh14) Rhatore 3 recruited so that the pulses coming from 1O13 tire in time offset from each other by 1/4 T (Figure 2). Simultaneously from the outputs of the counter 2 pulses arrive at the corresponding inputs of the Decoders 4-7 of each phase. converters. In order to carry out a set of positions from the control unit 9 on the set position bus, the signals are sent to the reversible counter 8, which transfers the trigger points to the corresponding state. From the output of the counter 8 jtMKy.ibsy come to other inputs doiitfratcherov 4-7. When the states of the trigger of the clock counter 2 and the states of the trigger of the counter 8 coincide, the corresponding diodes of the decoder's diode arrays close to the outputs 14-1.77 of the decoders 4, -7, the pulses with the frequency of operation appear. the thyristors of the converter, going to commute, are not thyristors mixed with each other by 1/4 T and shifted by Ha-S (Fig. 2) with respect to the corresponding pulses from the outputs 1O - 13 to the main thyristors of the converter. The shift of the pulse sequences relative to each other by 1/4 T is ensured by the fact that the diode arrays of the decoders 4-7, which are connected to the output buses of the counter 8, are the same on all the decoders, and the diodes of the decoders 4-7 that are connected to the output buses clock pulse counter offset from each other by 9O in time. Upon receipt of the second signal from block 9 over the position set bus, counter 8 changes its state, the latter leads to the fact that when the trigger states of the counters 8 and 2 coincide, the pulses traveling along the output buses 14-17 will be shifted relative to the corresponding pulses going over the output tires 10-13, already by 2 o, which leads to an increase in voltage. As the subsequent pulses coming from the control unit 9 through the position set bus to the reversible control counter 8, the pulses further from the output buses 14 to 17 are further shifted relative to the pulses from the corresponding tires 10 to 13 to the value W. If it is necessary to return positions from the control unit 9, the signal to the reversible counter of control 8 is already on the position return bus, which leads to the operation of subtraction. The operation of the device in this case occurs in a similar way, with the shift of the pulses in time coming from the outputs 14-17, relative to the corresponding impulses coming. from outputs 10 to 13, decreases as signals arrive from control unit 9. Tlkim, the proposed device reduces dimensions, weight and cost, and also increases reliability and efficiency without deteriorating the adjustment properties of the device. Apparatus of the Invention A device for discrete control of a multiphase pulse-width converter, comprising a master oscillator, a pulse counter, phase decoders, a reversible counter, a control unit, characterized in that, in order to increase reliability, it is additionally equipped with a decoder of non-shifting sequences of pulses, clock count 7 8 pulse pulses output tires connected to the inputs of the decoder non-shifting sequences of pulses, as well as with the inputs of the decoders of each phase, the other inputs of which are connected to the outputs of the counter esivnogo roar. Sources of information taken into account in the examination 1. Control circuits of thyristor-pulse converters with discrete STs. WIG pulses. Dnepropetrovsk Institute of Engineers of Railroad Transport, 1972, LITS, p. 97-105, 2. USSR author's certificate number 394907, cl. H O2p 13/16, 1071. 3. USSR author's certificate number 42429O, cl. H O2p 13/16, 1971 (prototype). FIG y l iJifenfat refff AT Fig1