SU746511A1 - Multiplying-dividing device - Google Patents

Description

The invention relates to computer technology, namely, to digital multiplier-dividing devices of a sequential type. Multiplier-divisible ³ devices are known, containing a pulse generator connected via a key to the source of the multiplicable (private), registers of the multiplicative, multiplier (divisor), dividend, product counter ⁴ (divisible), two comparison circuits, a switch, the output of which is via the bus `` Stop ' ^{1 is} connected to the input of the zero setting of the trigger, the input of the unit of which the bus 15 start is connected, the output of the trigger is connected to another input of the key [1].

However, the known device is difficult in design for 20 due to the fact that all registers contain 2n + 2 digits, while the operated numbers cannot be larger than n-digits, and has low speed due to the long time of 25 multiplication (division ), which is equal to ^T UMN (Del ') ~ where η is the number of bits;

- period of the frequency of the clock generation circuit; signals. up

Closest to the proposed one is a device containing the registers of the multiplicable, factor (divisor) and dividend, counters of the multiplicative (quotient) and product (divisible), a group of AND elements, a group of OR elements, a pulse sequence generator, a product counter. In this case, the input of the product counter is connected to the output of the OR elements of the group connected by their inputs to the outputs (elements AND groups, the first inputs of which are connected to the outputs of the multiplier (divider) register, and the second with the outputs of the multiplier (private) counter, the counting input of which is connected to the output pulse sequence generator [2].

However, this device requires time-consuming operations for converting direct codes of multiplicable and divisible codes into additional code. In addition, the outputs of the counter of the multiplicable (private) must have a pulse output when the triggers go from the state '' 1 '' to the state '' O ' ¹ , which may require a clock / grid, this is simplified by

The aim of the invention is the performance of the swarm.

The goal is that two schemes for comparing codes and one .. one vibrator for each decade of a multiplier (private) counter are introduced into the multiplier divider, and the information inputs of the first comparison circuit are connected to the outputs of the multiplier (private) counter and the outputs of the multiply register. The inputs of the second code comparison circuit are connected to the outputs of the product counter and the outputs of the dividend register. The third inputs of the elements AND groups are connected to the outputs of the corresponding single-vibrators, the fourth inputs of the second, third and fourth elements of the AND groups are connected to the inverse output of the first trigger of the decade of the counter of the multiplicable (private), the fifth input of the third element of the AND group is connected to the inverse output of the second category decades of the counter of the multiplied (private). The counting input of each decade is connected to the input of the corresponding single-shot.

In FIG. 1 shows a diagram of the proposed device; in FIG. 2 - stress diagrams at various points of one decade of the multiplier and

The multiplier dividing device consists of a generator 1 Lyapulse sequence connected via element 2 AND to the counter 3 of the multiplicable (private) · The outputs of the bits of the counter 3 are connected to the code comparison circuit 4 and to the multiplier 5. Other inputs of the code comparison circuit 4 are connected to the outputs of the register 6 multiplicative. Other inputs of the multiplier 5 are connected to the outputs of the register 7 of the multiplier (divider) .. The output of the comparison circuit, codes is connected via switch 8 to the input of the zero setting of trigger 9 to the input of the installation "unit ¹ " which receives the signal "Start ¹ ". The output of the multiplier 5 is connected to the input of the counter 10 of the product (divisible), the outputs of the bits of the counter 10 are connected to the comparison circuit of codes 11, the other inputs of which are connected to the outputs of the bits of the register 12 of the dividend. .

IS .25

Each Decade 13 of counter 3 consists of a tetrad of triggers 14, 15, 16, and 17 in the code 1-2-4-8. Each decade 55 18 of register 7 consists of a tetrad of binary bits 19, 20, 21 and 22, respectively, in code 5-2-1-1. Each decade 23 of multiplier 5 consists of a group of elements 24, 25, 26, and 27 of a single vibrator. 28. The first inputs of the elements 60 to 2, 25, 26, 27 And are connected to the outputs of the bits 19, 20, 21, 22, decade 18 of register 7. The second inputs of the elements 24, 25, 26, 27 And are connected to the outputs of 65 triggers, respectively 14, 15, 16, 17 counter 3 multiplicative (private).

The third inputs of the elements 24, 25, 26, 27 And are combined and connected to the output of the single-shot 28, the input of which is connected to the counting input of the corresponding decade 13, counter 3. The fourth inputs of the elements 25, 26, 27 And are connected to the inverted output of the trigger 14. Fifth the input of the element 26 And is connected to the inverse output of the trigger 15. The outputs of all decades 23 are combined by a group of elements OR 29. The output of the elements OR 29 of the group is connected to the input of the counter 10.

Before considering the operation of the entire device, it is necessary to familiarize yourself with the operation of the multiplier 5 by the example of its one decade, for example, the first. The work of the remaining decades is identical.

Upon receipt at the input of decade 13 of the counter 3 of the pulse sequence ά _{0 of the} generator 1, the triggers 14, 15, 16, 17 will begin to change their state according to the diagrams Qj, Q ₂ , Q ₃ , Q4 (Fig. 2) obtained from the direct outputs of these triggers The state of the inverted outputs Qf h ° Q ₂ , which will be necessary to explain the operation in the future, can be easily represented on the basis of diagrams. Q _t and Q ₂ .

Diagram i ₀ shows the frequency of input pulses ί _{σ of} decade 13 at the output of a single-shot 28.

On the bus a (Fig. 2) with a resolution potential from discharge 19 are present; five pulses out of ten pulses of frequency £ θ. On bus b, with permissions from discharge 20, two pulses from ten input pulses are present and, respectively, on buses c and d, one pulse each under similar conditions (i.e., resolution from bits 21 and 22). This can be easily verified by combining the corresponding potentials at the inputs of the elements 24, 25, 26, 27 I. Thus, if the resolution is obtained only from bit 21, then at the output of decade 23 (α-b - С - 3) we have one pulse out of ten input (see diagram '* 1' '). If permission is obtained from discharge 20, at the output of decade 23 we have two pulses (diagram 2). Three pulses (diagram 3) will be obtained at resolution from bits 20 and 23, etc. Four - resolution from bits 20, 21, 22; five resolution from discharge 19; six - resolution from bits 19 and 21; seven resolution with bits 19 and 20; , ΐοСе, мь '- permission from categories 19, 20th / 22nd; nine - resolution from bits 19, 20, 21 and 22. The group of elements 29 OR produces the addition of pulses of all decades 23, while all pulses are strictly spaced in time. The pulses of each subsequent decade are located on the counter circuit of the trigger switch, key 2.

wives in places of transfer of the tenth impulse of the previous decade.

Consider the operation of the device by the example of multiplication of two numbers 785 and 0.643.

. The exact product of the above numbers is 504, 755. The rounded result of the product up to a unit of the third character will be 505, to a unit of the fourth character - 504.8. The comma is taken purely conditionally, since in all other cases the missing digits in the rounded product are replaced by zeros. [The number 785 is entered in register 7 in the code 1-1-2-5, and the number 643 (excluding the comma) is entered in register 6 in the code 1-2-4-8. Switch 8 is set to ’’ multiplication ’’ when the output of circuit 4 is connected to trigger ’’ ’Stop 'bus 9. Multiplication starts by issuing a command (pulse) on the’ ’Start’ ’bus, setting trigger 9 to a single state. Key 2 opens, passing pulses from generator 1 to the input of counter 3. After chic 3 enters 643, matches 4 are triggered, the output signal from the swarm on the Stop bus will turn off and that will turn off

The supply of pulses to the counter 3 will stop. The multiplication process will end, in the counter 10 a number is written equal to the product rounded to the least significant digit, i.e. three-decad register 7 and counters 3 and 10, or 504.8 for four-decad; register 7 and counters 3 and 10.

Let us consider in more detail the process of multiplying these numbers with a three-decade register 7 and counters 3 and 10.

According to the arrow near blocks 3, and 7, showing the direction From the least significant to the highest, it can be seen that when the multiplier 785 is written to register 7, the digit 7 is entered in decade 18, which is joined with the younger decade 13 of the counter, 3, and the lowest digit 5 is written in decade 18, located at the neck of decade 13 of the counter, digits 7 will be included and 20; when writing the numbers 19, 20 and 22; when writing the numbers 5 - times row 19 (see diagrams 7, 8, 5). Consequently, from the first decade 23, pulses arrive at circuit 29 from open circuits 24 and 25, i.e. on buses a and b, from the second decade 23 pulses come from buses a, b, (open circuits 24, 25, 27), from the third decade 23 pulses come from bus a, (open circuit 19). We count the number of pulses that will come from all these buses to ⁽ circuit 29 (to the input of the counter 10). This number of pulses is equal to the result of the numbers 785 and 0.643. In the first decade 13 of counter 3, 643 pulses will arrive, so from the first decade 65 the number 505 is against old

3. When recording bits 19

- categories

5d .23, the number of Pulses equal to * 7, or rather ^1, will arrive on the a and b buses

7 (^ - 7).

The last term is checked up to diagram 7 as follows.

The input of the decade received 3 pulses, the output of the decade will pass according to diagram 7, also 3 pulses. In total, from the first decade, 420 + 28 4-3 = 451 impulses will go to circuit 29. In the second decade 13 of counter 3, 64 pulses will be received, and since for the second decade the multiplication coefficient was 8 (the number in the second decade 18 of register 7), then from the output of the second decade 23 the number of pulses equal to 73 · 8, and more precisely • cG '8 ⁺ But' · ^P R ^{And to} clarify the last term in the diagram '' 8 '' we have the sum of the pulses of the second decade 48 + 3 = 51.

On the third decade 13 of counter 3, 6 pulses will be received, and since the multiplication coefficient for the third decade was 5 (the number 5 in the first decade 18 of register 7), then from the third decade 23 will be received according to diagram 5-3 of the pulse. The total amount of the product will be 451 +51 + 3 = 505 pulses.

With four-decade registers 6, 7, in which we write the same numbers (with the addition of 0), i.e. 6430 and 7850, respectively, arguing in the same way with kme with four-decade counters 3 and 10:

from the first decade 23: ^^ - 7 + ^ - 7 + ^ = 4500 impulses; ’_ From the second decade of 23: ~ 8 + ^ - 8+ (jM)” 5 | 5 pulses; ll from the third decade 23: - ^ - 5 + (- ^ - 5) = 32 pulses.

The product will be 5048 pulses or with (taking into account the comma number 504.8.

The division operation occurs when switching the switch 8 of the output of the circuit 11 to the ’’ Stop ’’ bus. The dividend in the code 1-2-4-8 is entered in the register 12, and the divisor in the code 1-1-2-5 is entered in the register 7.

Similar to multiplication, the command ’’ Start ’’ is given.

The counter 3 operates and pulses arrive from the output of circuit 5 to the counter 10 '. As soon as the counter 10 counts the number of pulses equal to the number in the register 12, then coincidence circuit 11 will work, which will stop the whole process. The counter 3 will record the quotient. V. This is easy * to make sure, if you look at the above example (multiplication), as if in the opposite order, the product is known in advance 505 • it is divisible and is entered in [register 12. One of the factors is also known (785) - this is the divisor that is entered in register 7. Another factor, the number 643, is a quotient ί will be counted in counter 3 (it is previously unknown). But the fact that counter 3 counts exactly 643 pulses during the division time when dialing number 505 by the counter 10, we have already seen on the example of multiplication.

Thus, the proposed device allows ^ relatively simple means to quickly multiply (divide) the numbers represented by the binary decimal code.

Claims (2)

The definition refers to the computational technique, namely, to digital multiplying-dividing devices of a sequential type. Multiplying-dividing devices are known that contain a pulse generator connected via a key to a source of multiplicative (private), multiplier register, multiplier (divider), dividend, product counter (divisible), two comparison circuits, a switch, whose output is connected to the bus Stop. setting the trigger zero, to the installation input of the unit of which the start bus is connected, the trigger output is connected to another key input 1. However, the known device is complex in a constructive 11 s: completion due to the fact that the registers contain 2n + 2 p As the operating numbers can not be more than n-bits, and has a low fast action due to the large multiplication (division) time, which is equal to Thum (Ael1 gre n - the number difference of the numbers; - the frequency of the output circuit - clocks; signals. The closest to the proposed is a device containing multiplicable, multiplier (divisor) and dividend registers, multiplicable (particular) and product (divisible) registers, AND group of elements, OR group of elements, pulse sequence generator, product counter. At the same time, the input of the product counter is connected to the output of the OR elements of the group connected by its inputs to the outputs (elements AND groups, the first inputs of which are connected to the outputs of the multiplier register (divider), and the second to the outputs of the multiplicable (private) counter, the counting input of which is connected to the output pulse sequence generator 2. However, this device is time consuming to perform, the operations of converting direct multiplicable and divisible codes into an additional code.In addition, the outputs of the multiplicable (particular) counter There must be a pulse output when the triggers go from state "1 to state O", which may require a clocking (grid. The purpose of the invention is to increase speed and simplify the device. The objective set is achieved by introducing two multiplicative devices comparison circuits and one .. one vibrator for each decade of the multiplicable (private) counter, and the information inputs of the first schema and comparison are connected to the outputs of the multiplicable (private) counter and the outputs of the multiple multiply register. The inputs of the second code comparison circuit are connected to the outputs of the product counter and the outputs of the register of the dividend. The third inputs of the And group elements are connected to the coqt outputs, one-vibrator rearrangements, the fourth inputs of the second, third and fourth elements of the And group are connected to the inverse output of the first trigger of the decade of the multiplicable (private) counter, the fifth input of the third element of the And group is connected to the inverse output: second decade of the multiplicable (private) counter. Counting in each decade is connected to the input of the corresponding one-shot. FIG. 1 is a diagram of the device according to FIG. 2 - stress diagrams in different points of one decade of the multiplier Multiplying and durable; The device consists of a generator 1 1 4 pulse sequence, connected through the element 2 and to the counter 3 multiplicative (private). The outputs of the bits of the counter 3 are connected to the code comparison circuit 4 and to the multiplier 5. Other inputs of the code comparison circuit 4 are connected to the outputs of register b of the multiplicand. Other inputs of the multiplier 5 are connected to the outputs of the register 7 multiplier (divider),. The output of the comparison circuit, of the codes, is connected through a switch 8 to the input of the zero setting of the trigger 9 to the input of the unit installation of which a Start signal is given. The output of the multiplier 5 is connected to the input of the counter 10 (divisible), the outputs of the bits of the counter 10 are connected to a comparison circuit 11, the other inputs of which are connected to the outputs of the bits of the register 12 of the dividend. Each decade of 13 counter 3 consists of a tetrad of triggers 14, 15, 16, and 17 in code 1-2-4-8. Each decade 18 of register 7 consists of a tetrad of binary bits 19, 20, 21, and 22, respectively, in code 5-2-1-1. Each de 23 kad 23 multiplier 5 moles from the group of elements 24, 25, 26 and 27 I and the innovation circuit. 28. The first inputs of elements 2, 25f 26, 27 And are connected to the outputs, respectively, bits 19 20, 21, 22 decade 18 of the register 7. The second inputs of elements 24, 25, 26, 27 And are connected to the outputs, respectively, of the flip-flops 14, 15, 16, 17 counter 3 multiplicative (private). The third inputs of the elements 24, 25, 26, 27 And combined and connected to the output of the one-shot 28, the input of which is connected to the counting input of the corresponding decade 13, counter 3. The fourth inputs, elements 25, 26, 27 And connected to the inverse output of the trigger 14. P The input of element 26 is connected to the inverse output of trigger 15. The outputs of all decades 23 are united by a group of elements OR 29. The output of elements OR 29 of the group is connected to the input of counter 10. Before considering the operation of the entire device, it is necessary to become familiar with the operation of multiplier 5 using the example of its operation about hydrochloric decades, such as the first. The work of the remaining decades is identical. When the input of decade 13 of the counter 3 of the pulse sequence io of the generator 1 triggers 14, 15, 16, 17 begin to change their state according to the diagrams QJ, Qg, Qg, 04 (Fig. 2), obtained from the direct outputs of these triggers The state of the inverse outputs QI and ° 02, which will later be necessary for the explanation of the work, can be easily represented on the basis of the diagrams, Qt and QJ. . The io diagram shows the frequency of the input pulses io of decade 13 and the output of the one-shot 28. The bus a (Fig. 2) with a resolution potential from bit 19 is present; Five pulses out of ten pulses of an Ig frequency. On bus b, when discharging from bit 20, there are two pulses from ten input and, respectively, on tires C and d by one pulse under similar conditions (i.e. resolution from bits 21 and 22). This can be easily seen by combining the corresponding potentials at the inputs of elements 24, 25, 26, 27 I. Thus, if the resolution is obtained only from bit 21, then at the output of decade 23 (a-b-C -d) we have one pulse from ten input (see diagram 1). If the resolution is obtained from bit 20, we have two pulses at the output of decade 23 (diagram 2). Three pulses (diagram 3) are obtained at resolution from bits 20 and 23, and so on. Four - resolution from bits 20, 21, 22; 5 resolution from bit 19; six is resolution from bits 19 and 21; Set resolution from bits 19 and 20; , T6Ofl- - resolution from bits 1-9, 20 and 22; Nine is the resolution from bits 19, 20, 21 and 22. A group of elements 29 OR produces the addition of pulses of all decades 23, while all the pulses are strictly separated in time. The pulses of each subsequent decade are located at the places where the tenth pulse of the previous decade is transferred. Consider the operation of the device on the example of multiplying two numbers 785 and 0.643. . The exact product of the numbers indicated above is 504, 755. The rounded result of the product with an accuracy of one unit of the third character will be 505, and the unit of the fourth character will be 504.8. The condition is purely conditional, since in all other cases it is lacking, the bits in the rounded product are replaced with zeros. The number 785 is entered in register 7 in code 1-1-2-5, and the number 643 (not counting the comma) is entered in register 6 in code 1-2-4-8. Switch 8 is set to multiplication when the output of circuit 4 is connected to the bus Stop trigger 9. Multiplication begins by issuing a command (pulse) on the Start bus, setting trigger 9 to one state. Key 2 opens, skipping it pulses from generator 1 to counter 3, after dialing 3 of the number 643, a coincidence circuit 4 is activated, the signal from the output to which the bus stops turns off the trigger and that in turn turns off key 2 Stop pulses to count 3 The multiplication process is over, in the counter 10 the number equal to the product rounded to one junior time will be written, i.e. the number 505 pr three-decade register 7 counters and 10, or 504.8 with four-decade register 7 and counters 3 and 10. Let us consider in more detail the process: multiplying these numbers with three-decade register 7 and counters 3 and 10. According to the arrow near blocks 3 and 7, showing the direction From the smallest bit to the oldest, it can be seen that when writing the multiplier 785 to register 7, digit 7 is entered in decade 18, butting with junior decade 13 of counter 3, while younger digit 5 is recorded in decade 18 located opposite the senior decade 13 counter 3. When you record the number 7 will be included bits 19 and 20; when recording the number 6 - bits 19, 20 and 22; when writing the number 5 - series 19 (see diagrams 7, 8, 5). Consequently, from the first decade 23 to the circuit 29, the pulses come from open circuits 24 and 25, i.e. on tires a and b, from the second decade 23 pulses come from bus a, b, (open 24, 25 27), from the third decade 23 pulses come from bus a, (circuit 1 is open) Let's count the number of pulses from all of these tires to the circuit 29 (to the input of the counter 10). This number of pulses is the result of the product of the numbers 785 and 0.643. The first decade 13 of the counter 3 will receive 643 pulses, therefore from the first decade 23 the tires a and b will receive the number of "Gmpulses equal to A 7, or more precisely, 7 (-T). The last term is checked in diagram 7 as follows. 3 pulses were sent to the output of the decade, according to diagram 7, there were also 3 pulses. Total from the first decade to the circuit 29 will be received 420 28 -V 3 451. The second decade of 13 counter 3 will receive 64 pulses and | Because for the second decade the multiplication factor was 8 (the number in the second decade is 18 of register 7), then from the output of the second decade 23 the number of pulses will go to circuit 29: 8, or more precisely to 8 4 (8). When refining the last term in the diagram, we have the sum of pulses of the second decade 48 + 3 51. On the third decade of 13 counter 3, 6. pulses will arrive and since the coeff. Since the multiplication patient for the third decade was 5 (the number 5 in the first decade 18 of register 7), then from the third decade 23 it will arrive according to the diagram 5-3 of the pulse. The total sum of the product will be 451 51 P - 3 505 pulses. With four-decade registers 6, 7, in which we write the same numbers (with the addition of 0), i.e. 6430 and 7850 respectively, the reasoning is similar to that of four-counter counters from the first decade of pulses; hoo lp f. from the second decade (| .8) 515 pulses; AO from the third decade 23: - 5+ (pulses. The product will be 5048 pulsesB or {taking into account the 504.8 decimal number. The division operation occurs when switching switch 8 of the output of circuit 11 to bus Stop. The register 12 is assigned a dividend in the code 1-2-4-8, and the register 7 is divided into a code 1-1-2-5. The Start command is given in the same way as the multiplication. Counter 3 also works from the output of circuit 5 to the counter 10. Pulses come in. As soon as counter 10 counts the number of pulses equal to the number in register 12, a coincidence circuit 11 will work, which will stop the entire drive. process. In meter 3, the quotient is recorded. V. it is easy to convince if you consider the above example (modulation) as in reverse order of npoH3BejieHHe 505 knows this divisible in advance and it is entered in the register 12. One of the multipliers (785 ) is a divisor that is entered in register 7. Another factor, the number 643 - this quotient will be calculated in counter 3, it is unknown in advance). But the fact that the counter 3 counts during the division of the 643 pulses when dialing 10 the number 505 ei has already been verified by the multiplication measure. Thus, the proposed nosBOJiHSi device is relatively simple means to produce a quick multiplication (division) of the numbers represented by the binary-decimal code. Claims of Invention A multiplication-division device containing multiplicable registers, a multiplier. (divider) and a dividend, multiply (private) and search (divisible), AND elements, a group of OR elements, a pulse sequence generator, a product whose input is connected to the output of OR elements of a group connected by its inputs to the AND elements of the group, the first inputs of which are connected to the outputs of the multiplier register (the divider, and the second ones with the multiplier (private) output, the counting input of which is connected to the output of the pulse sequence generator, from which, for speed reasons and simplify the device, in addition, two code comparison schemes are introduced and one mono-vibrator for each decade of the multiplicable (private) counter, with the information INPUTS of the first comparison code of the codes connected to the outputs of the multiplicable (private) counter and output of the multiplicable register, and the inputs of the second comparison circuit codes are connected to the outputs of the counter of the product and the outputs of the register-divisible, the third inputs of the elements And groups are connected to the outputs of the corresponding one-shot, the fourth inputs of the second, third and fourth of elements and groups connected with 1Nversnym; the output of the start decade trigger of the multiplicable (partial) counter, the fifth input of the third element of the AND group is connected to the inverse output of the second decade of the multiplicative counter (partial), the input of each decade of which is connected to the input of the corresponding single vibrator. Sources of information taken into account in the examination 1. The author's certificate of the USSR 572786, cl. G 06 F 7/39 1975 (prototype). 2. Authors certificate of the USSR 411452, cl. G 06 F 7/395, 1971. Aeleni „// (/ ate „Stop Io MP il t  P8 2J c a r TH mm QL t  AND 2f CEH Q : at (2 J S 9 fO ft f2 and / f fO tV fa Fig 2