SU744938A1 - Random pulse generator - Google Patents

Description

(54) GENERATOR OF RANDOM PULSES

The invention relates to the field of nuclear radiometry and can be used in setting up and testing multichannel radiometric intensometers using random pulse generators with a distribution of intervals between pulses that are close to exponential in the range of th 4 times, the value of the dead time of the random pulse generator; tiHAKe is the maximum value of the interval between pulses, a non-minimal quantum At changes in output intervals in the time range tw equal to t ,, (1) where 1 is the switching time of the elements of the input circuit of the device under test. To Under these conditions, the flow from the random pulse generator has the same effect on the intensity meter as the real flow of pulses from the radioactive radiation detector, and can be used as an effective replacement for it. A random pulse generator 1 is known, which contains a primary source of noise, connected through a broadband amplifier with inputs of two comparison elements, the outputs of which through forming devices are connected to the inputs of the OR element, the output of which is the output of the device. Comparison elements have equal and opposite sign levels of operation, by changing which intensity is adjusted. Such a device, although it has a continuous distribution of intervals in the tM-tmiK time range, and At 0 for it, its essential drawback is the non-linearity of controlling the intensity of the output pulses and the difficulty of obtaining high intensity flows. Also known is a random pulse generator 2, which, by its technical essence and a set of essential features, is closest to the proposed device. This generator contains 11 and 20-bit M-sequence shift registers, an AND element and a group of 8 modulo-2 adders, the outputs of which are connected to the inputs of the And element, and the inputs of each of the adders are connected to the outputs of 8 bits first and second registers. The synchronization inputs of the registers are connected to the output of the clock generator, and the output of the AND element is the output of the device.

The known generator creates a deterministic flow of pseudo-random pulses with a minimum quantum of change in output intervals At equal to the synchronization period T. The minimum value of At, corresponding to the maximum intensity of the pulse following, is determined by the speed of all elements of the generator and can be taken equal to

M Gs (2-4) 1 "(2)

where bp is the switching time of all generator elements.

The disadvantage of the known generator is that, in accordance with the expression (1), the determinacy of the output flow of such a generator can be neglected only in the region of high intensities. However, for this, all its elements must have a speed many times higher than the elements of the device under test. This leads to a significant complexity and cost of the device.

The purpose of the invention is to expand the functional capabilities of the device, namely, to eliminate the influence of the deterministic power of the output signals of the generator in a wide range of intensity variations and to simplify the device.

The goal is achieved by the fact that in a known device containing a generator of clock pulses, modulo-2 adders, the first and second M-sequence shift registers with non-multiple numbers of bits, the synchronization inputs of which are interconnected, the "discharge outputs of the first and second shift registers connected in pairs with the inputs of each of the adders, outputs (n-m} of the latter are connected with the corresponding (n-m inputs of the main element I, directly added an additional third shift register G-sequence with the number of bits, non-multiple numbers of bits of the first two shift registers, an intensity setting block, a counter, a comparison element, an additional element .AND, D-flip-flop, m elements OR, and a normalizer, so that the outputs of the other m adders through the corresponding and the OR elements are connected to the remaining t inputs of the main element AND, and the second inputs of each of the OR elements are connected to the outputs of the intensity setting unit, while the output of the synchronization generator is connected to the synchronization inputs via a counter ex shift registers with the first input of the D-flip-flop, the second input of which is connected to the output of the main element And, and the output connected to the first input of the additional element And, the second input of which is connected to the output of the reference element, one group of inputs of which is connected to the corresponding outputs of the counter bits , another group of inputs is connected to the outputs of the bits of the additional shift register, and the output of the additional element I is connected to the input of the driver.

Kah FIG. I presents the block diagram of the proposed device; in fig. 2 - pulse diagram.

The proposed device contains shift registers of M-sequences 1, 2, 3 with non-multiple numbers of bits, (p-rp) bit outputs of shift registers i and 2 are connected in pairs with the corresponding inputs of adders -4 modulo 2.

j Outputs (i- / 37 / adders 4 are connected by the corresponding inputs of the element 5. And the other t of the bit outputs of the shift registers 1 and 2 are connected in pairs with the corresponding inputs of each of the adders 6 modulo 2. The outputs of the adders 6

S through tons of OR 7 elements are connected to the corresponding inputs of element AND 5. The second inputs of each of the elements OR 7 are connected to the corresponding outputs of the intensity setting unit 8. The output of elements AND 5 is connected to the input of the D-flip-flop 9 whose input is connected to the inputs synchronization of shift registers 1, 2, 3 and through the counter 10 with the output of the generator of clock pulses 1 with an octave frequency change. The discharge outputs of the counter 10 are connected to one group of inputs of the comparison element 12,, 1ru | -a, a group of inputs of which is connected to the discharge outputs of the shift register 3. The output of the comparison element 12 is connected to one input of the AND element 13, the other input of which is connected to the output C-flip-flop 9. The output of the electrical elements And 13 is connected to the input of the imager 14, the output of which is connected to the output bus 15 of the generator of case Aina X and m pulses.

tj The speed of the elements 3, 9, 10 ... 14 is determined by the required (th value At,

The speed of the remaining elements may be less than K times, where K is the conversion factor of counter 10.

The device works as follows.

 Pulses of the generator II clock pulses (Fig. 2; a) with octave frequency bending, recalculated by the counter 10, synchronize the shift registers 1, 2, 3 and D-flip-flop 9 (Fig. 2, 6}

g (. (- that) bits of shift registers 1 and 2 are compared in pairs using adders 4 modulo 2 and element 5. Other l bits of shift registers 1 and 2 are compared in pairs using adders 6 PS modules 2. Information from the output m adders 6 modulo 2 is fed to the inputs

elements AND 5 through m elements OR 7.

Info5 {from element output 5

(Fig. 2, c) is delayed and formed

Claims (2)

p-trigger 9, at the output of which a pseudo-random sequence of logical "O and" 1 {FIG. 2, d), and the intensity of the latter is determined by the number of elements OR 7, to the inputs of which from the block of intensity 8, the logical "O. Comparison element 12 compares the linearly increasing contents of counter 10 (Fig. 2, e) with a random number specified by shift register 3 (Fig. 2, e) and outputs, at the time these numbers are equal, the logical "1, which the input element And 13 (Fig. 2, g) expresses at its output the logical 1, if at this time the D-flip-flop 9 is in one state. The pulses from the output of the element And 13, formed by the duration to the desired value by the driver 14, are fed to the output busbar of the generator 15 (Fig. 2, h). The main intensity change is made by adjusting the frequency of the clock generator 11 within one octave, and the discrete change in intensity is performed by the intensity setting unit 8 by changing the number of logical zeros at the inputs of the elements OR 7. The total range q of the intensity change is When the quantum At changes from TO 2AtMw The use of new nodes in the proposed invention in connection with the well-known nodes favorably distinguishes the proposed generator from the known generator chosen for the prototype, so How does it eliminate the influence of the determinism of output signals in a wide range of variation in the intensity of the output pulses following a decrease in the magnitude of the quantum of change in the intervals between output pulses. This is achieved by further splitting it, while at the same time simplifying the device due to a decrease in the number of high-speed elements necessary to obtain the required small quantum of change in the interval between output pulses. In addition, in the proposed generator, the range of changes in the intensity of the output pulses may be expanded while maintaining the magnitude of the quantum of change in the duration of the output intervals by simply increasing the volume m of the group of adders modulo 2, the OR elements, and the number of bits of the first and second shift registers made on the basis of chips low speed and greater integration. For example, with m 14 And a corresponding increase in the number of bits of the first and second shift registers, the generator has a range of output intensity variation (15-H5 -10) pulses / s with a quantum of change in the output interval of not more than 20 n, which allows using the known device for effective checking of intensimeters. Claims: Random pulse generator, comprising a clock generator, n adders at r-thru 2, first and second M-sequence shift registers with non-multiple numbers of bits, the synchronization inputs of which are combined with each other, and n - bit outputs of the first and second shift registers connected in pairs with the inputs of each of the adders, the outputs (p-t) of the latter are connected to the corresponding (p-t) inputs of the main element I, which is directly distinguished by the fact that in order to expand the functional it is possible the device, an additional third shift register of the M-sequence with the number of bits, non-multiple numbers of the bits of the first two shift registers, intensity setting block, counter, reference element, additional AND, D-flip-flop, n OR, and driver, were entered into it. in such a way that the outputs of the remaining tons of adders through the corresponding tons of the OR elements are connected to the remaining inputs of the main element AND, and the second inputs of each of the OR elements are connected to the outputs of the intensity setting unit, while the synchronization generator stroke through the counter is connected to the synchronization inputs of all shift registers and to the first input of the D-trigger, the second input of which is connected to the output of the main element And, and the output connected to the first input of the additional element And, the second input of which is connected to the output of the comparison element, one the group of inputs of which is connected to the corresponding outputs of the counter bits, another group of inputs is connected to the outputs of the bits of the additional shift register, and the output of the additional element I is connected with shaper inlet. Sources of information taken into account in the examination 1. USSR author's certificate number 273536, cl. H 03 K 3/64, 1969. 2. “Electronic Engeneering, 1977, 49, No. 591, p. 21-23. L P h "So 15 P with Chz Ro