SU744721A1 - Method of retrieval of information from magnetic storage - Google Patents

Description

(54) METHOD FOR SELECTING INFORMATION FROM MAGNETIC MEMORIZING DEVICE

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The invention relates to the field of information storage and can be used to build operational memory devices of computers and automation systems.

A known method of retrieving information from a magnetic storage device with a coincidence of half currents, which is carried out by the coincidence of 2 half currents along two coordinate objects.

The disadvantage of this method of retrieving information is the insufficient speed due to the large amplitude and duration of the disturbance in the read winding from the half-selected cores.

The closest to the present invention is a method of retrieving information from a magnetic storage device with a combination of half-currents (structures 2, 5 D and 3 D), which means that when reading, first half-time is fed along one coordinate winding, and then after a fixed time-period half-time is fed along the other coordinate winding, the delay between the half-currents is set fixed for the worst case (the maximum amplitude and duration of the disturbance in the read winding from the half-selected cores) | 1.

However, due to the fact that the device operates most of the time under normal operating conditions, when the amplitude and duration of interference from half-selected cores is significantly less than for the worst case, there is a loss of sample time, since for the worst case the duration of the falloff from the half-selected cores is significantly greater than in normal operating conditions, i.e., to obtain the required speed, it is necessary to increase the amplitude selection of the read from the memory element It is the signal that reduces the area of stable operation of the memory device (degraded reliability of operation). Thus, the known method provides less: speed and less reliability of the storage device than the proposed method. .

The purpose of the invention is to increase the speed and reliability of the magnetic storage device,

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Post-1 (1G1a goal is achieved by the fact that about the method of retrieving information from a magnetic storage device, a current pulse is first supplied via a full coordinate bus and, after a fixed time interval, current impulses are fed along another 1-pin coordinate, the time interval is reduced to a smaller or equal to the minimum allowable value of the amplitude of the information signal.

FIG. 1 shows a possible form of interference in the read winding from half-selectable memory elements; in fig. 2 - possible block diagram of the device that implements the proposed method (for the structure 2, 5 D).

So, as interference from half-emitted cores can have the form shown in pas FIG. 1 b, the proposed method is applicable to multi-bit memory devices, or to mass-storage devices with a large number of read winding sections, since the probability of occurrence in all windings (sections) of the interference shown in FIG. 1 with the same time parameters, dismissively small.

The device contains address formers 1, address winding 2, storage elements (ring cores) 3 and 4, address-discharge winding 5, readout winding b, address-discharge formers, 7, amplifier 8 in reproduction, register 9 numbers ( shown for a single razrpaa), control circuit 10, circuit II OR.

The device works as follows.,; :.,

in the read cycle, the signal from the control circuit 10, which triggers the address-split shapers 7, which in the address-discharge winding 5 are half a sample, the pulse from the half-selected cores 4 is generated in the read winding 6 Outputs of circuit 11 OR, to the other inputs of which impulses from other bits are received. The pulse from the circuit 11 OR is supplied to the circuit 10 of the control. The control circuit W triggers the address shaper 1 on the pulse front set. The sum of half-currents from the address-discharge 7 and the address shaper 1 remagnetizes the core 3. The information signal read from the core 3 goes to the playback force 8, and from it to the 9th register . For outputting 1enn of the useful signal from the interference, the control circuit 10 at the moment the address current is applied to the register on the 9th day of the strobe signal, allowing the passage of the information signal from the playback amplifier 8.

For the case when the interference is from the Tyuly chosen address heart and a half heart

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less than the level of amplitude selection of the amplifier 8 playback in all times 1 dax, it is necessary to provide for the formation in the control circuit 10 of the control of more than 1 pulse to start the address driver

with a guaranteed delay, which is determined by the front of the addressable discharge of the current and by the delay of the reproduction amplifier 8.

In case of using insufficiently fast playback amplifier 8 and control circuit 10, to eliminate time losses due to reproduction of the playback amplifier and control circuit, it is necessary to change the amplitude selection level of the amplifier 8 when the address shaper I is started. At the time of launching the addressable bit shaper 7, the amplitude level selection amplifier 8 playback high. The signal from the control circuit 10 at the time of starting the address shaper I reduces the amplitude selection level of the playback amplifier 8 to a value sufficient to extract the signal read from the core 3.. The difference between the amplitude selection levels should be sufficient to

, by the time of gating, the interference from the half-selected cores has decreased to a value less than the lower level of amplitude selection of the playback amplifier 8. To reduce loosening of cores,. It is necessary to organize the read winding in such a way that the number of pairs of such cores is as low as possible.

The operation of the memory structure, tours 3 in a read cycle is similar.

The use of the estimated time of separation of the half-currents of the sample, the value of which is determined by the moment T () m. reducing the half-selected interference to a value less than or equal to the minimum possible am.mp lud. information signal, allows you to reduce the sampling time of information under normal operating conditions (increase speed), and with decreasing, the level of amplitude selection of the read signal from the paginal and signal center signal. to increase the area of stable operation (reliability of functioning) of the memory device. .

Automatic tracking of the end of interference also avoids failures in the operation of the storage device, which can be caused by an unforeseen increase in the duration of the interference for the worst distribution of information at the boundary values of one-and-a-half (s).

Claims (1)

Invention Formula The method of sampling information from the magnetic storage device, which is based on the supply of current HMiFv.ibca one by one coordinate type and, at a fixed time interval, applying a current pulse to another coordinate axis, which is aimed at improving the speed and reliability of the sample, fixing the time interval for reducing the interference to a value less than or equal to the minimum acceptable amplitude value of the information signal . Sources of information taken into account in the examination I. Shigin A. G, and Deryugin A. A. Digital computing Maitin. M., “Energie, 1975, p. 155-156 (prototype). t ia i 74472