SU738168A1 - Mds-transistor- based multistage switching apparatus - Google Patents

Description

The invention relates to automation and computing and can be used in instrumentation, .5

The multichannel analog signal switch is known to contain in each channel an MDP transistor, a repeater, a voltage detector, a thermal-dependent current generator, key transistors, and resistors 11. This implementation does not take into account that the temperature coefficient of the drain current changes and can accept a positive / zero and negative values. Therefore, in individual cases with a change in temperature, the compensation that the thermodependent current generator implements impairs the stabilization of the resistance of MIS transistors. 20

Also known multistage switch on MIS transistors, co. holding the input signal busses connected to the sources of the first-stage MOSFET transistors, whose drains are connected to the sources of the second-stage MIS transistors, to the drains of which the load resistor is connected, the output signal bus with one input of the summing Opea-, “

A circuit amplifier, the other input of which is connected to the gate signal bus, the gates of all MOS transistors are connected via a matching resistor to the gate signal bus, as well as switches 2.

The disadvantages of the known .fopa switch are the modulation of the resistance of the channel of MIS transistors depending on the magnitude of the drain current and on the temperature coefficient of the drain current, which reduces the reliability of the switch operation.

In order to improve the reliability of work in a multi-stage switch

jaMDP transistors containing input signal buses connected to the sources of first-stage MOS transistors, whose drains are connected to the sources of the corresponding second-stage MIS transistors, to the drains of which a load resistor is connected, the output signal bus with a single input Ivt-emitting operational amplifier connected to it, the other input of which is connected to the unlocking signal bus, the gates of all the KDP transistors through the corresponding resistors under the key ΓSyuy, the charging circuit, also switches, are entered Va subtractive devices, an absolute voltage isolation unit, two thermostable current sources, a thermostable resistor, and an additional MOS transistor, with the inputs of the first subtractive device connected to the output bus and via a switch to the source of one of the MOS transistors of the second stage, and the output - with the third input of the summing operational amplifier and through an absolute value allocation unit, voltage with connected parachl thermally stable current sources, the outputs of which are connected us to a thermostable resistor, respectively; to the source of the additional MOS transistor and through the second subtractive device - to the fourth input of the summing operational amplifier, the output of which is connected to the common bus of switches, the second output of which is connected to the gates of the corresponding MOS transistors.

The drawing shows a diagram of the device for the case when the number of steps is two, and the number of channels is four.

Bus 1-4 input signals connected to the sources of the key MOS transistors 5-8, forming the first stage. The drain of these transistors are connected to the sources of the MOS transistors 9 and 10, forming the second stage. Variable load resistor 11 is connected to the drains of MOS transistors 9 and 10 and to 111 in 1-input signals 12. One input of the detractor device 13 is connected to the output bus 12, and the second input is connected through the switch 14 to the source of the MIS transistor 9. The output of the detractor device 13 connected to the input of the absolute value selection unit 15 and to the third input of the summing operational amplifier 16. The output of the absolute value selection unit 15 is connected to the control inputs of the thermally stable current sources 17 and 18. The output and source of electricity- 18 is connected to terminal thermostable resistor 19 whose other end is connected to the common point of the device. The output of the current source 17 is connected to the sources of the MOS transistor 20, the drain of which is connected to a common point. The first input of the subtracting device 21 is connected to the output of the current source 18 and to the output of the thermostable resistor 19, the second input is connected to the output of the current source 17 and to the source of the MDP transistor 20, and the output to the fourth input of the summing operational amplifier 16. The unlocking voltage 22 is connected to the second input summing operational amplifier 16. The output of the amplifier 16 is connected. to the common bus switches 23-28,

which is also connected to the gate of the CPU transistor 20. The bus gate signal 29 through resistors 30-35 is connected to the gates of all key MOS transistors 5-10.

The proposed multi-stage switch works as follows.

MOSFET transistors 5 and 9 are opened by unlocking voltage supplied from summing operational power 16 through closed switches 23 and 27. Switches 24, 25, 26, 28 are open, MOS transistors 6, 7, 8 and ID are locked by a blocking source bus 29 through resistors 31, 33, 34 and 35. In this case, power is dissipated only by resistors 30 and 32. The input voltage from bus 1 through open transistors 5 and 9 is fed to the first input of summing op amp 16, which stabilizes the voltage open source shutter gate anzistors. The switch 14 to the input of the subtracting device 13 connects the source of the MOS transistors 9 or 10, which of them is open.

To eliminate the modulation of the resistance of the MIS transistors from the flowing current, a voltage drop across the MOS transistor 9 is used, the resistance of which is known. The high-resistance inputs of the subtractor 13, which forms a voltage proportional to the switching current, are connected to the source and drain of the MIS transistor 9 and supplies the third input of summing amplifier 16, thus stabilizing the resistance of the channels of open MDP transistors from the flowing current.

The output voltages from the subtractor 13 are also fed to an absolute voltage selection unit 15, which is part of the device for eliminating the temperature dependence of the drain current at a constant drain-source voltage, respectively, to eliminate the temperature dependence of the resistance of the open DF transistor. The temperature dependence of the drain current of a MIS transistor at a constant voltage run-off is a function of the absolute value of the magnitude of the drain current, i.e. depends on the sign of the current.

Claims (2)

The absolute value selection unit 15 controls the thermally stable current sources 17 and 18, which through the MOSFET 20 and the thermostable resistor 19 set an absolute value equal to the switched current. When the current coordinate corresponds to the point “temperature compensation. The MOS transistor, the country, has a nominal thermal resistor 19 equal to the resistance of the MOS transistor 20. The voltage drop across the MIS transistor is a function of the drain current, temperature and the gate-source voltage, however, since the latter is the same for all open MOSFET transistors, its effect on all transistors is the same. The difference between the voltage drops on the thermostable resistor 19 and the MOS transistor 20 produces a subtractive device 21 which as a correction voltage goes to the second input of the summing amplifier 16. The trigger signal bus 22 is connected to the fourth input of the summing amplifier 16. Similarly, the circuit for the case when the number of stages is 3, 4 and more with the number of channels 8, 16 and more, respectively, increasing the number of MIS transistors 5-10, switches 23-28 and resistors 30-35. - Claims of the invention Multistep 1mutator on MOS transistors, containing input buses connected to sources of MIS transistors of the first stage, whose outlets are connected to the sources of the corresponding MOS transistors of the second stage, to the outlets of which the load resistor of the output signals is connected to connected to it by one input of the summing operational amplifier, the other input of which is connected to the bus of the unlocking signal, the gates of all MOS transistors through the respective resistors connected to the busbars e-locking signal, as well as switches, which are used for the purpose of increasing the reliability of the work, in it were added subtractive devices, an absolute voltage value selection unit, two thermally stable current sources, a thermostable resistor and an additional MOS transistor, while the inputs of the first subtractive device are connected respectively to the output bus and via a switch to the sources of one of the MIS transistors of the second stage, and the output to the third input of the summing opamp and the block selection The absolute value of the voltage is YNG - GG6-ё-V (Gnstaksh-p-a p-alEgölln-thermostable current sources, the outputs of which are connected respectively to the thermostable resistor, to the source of the additional MIS transformer and through the second subtractor to the fourth input of the summing operational amplifier, the output of which is connected to the common bus of the Lyuchel, the second terminals of which are connected to the gates of the corresponding MOS transistors. Sources of information taken into account in the examination 1. The author's certificate of the USSR 536598, cl. H 03 K 17/60, 03.11.75 (analog). 2. Authors certificate of the USSR 389627, cl. H 03 K 17/56, 12.07.71.