SU734895A1 - Discrete demodulator of frequency telegraphy signals - Google Patents

Description

one

The invention relates to a radio communication technique and can be used when receiving discrete information.

A discrete demodulator of frequency telegraphy signals is known, containing a clock pulse counter, the outputs of which are connected to the first inputs of the And elements, the outputs of which are connected to the inputs of a trigger, the output of which is connected to the input of a low-pass filter {.

However, the known discrete demodulator has low noise immunity.

The purpose of the invention is to improve noise immunity.

This is achieved by the fact that a discrete demodulator of frequency telegraphy signals containing a clock counter, the outputs of which are connected to the first inputs of the And elements, the outputs of which are connected to the inputs of a trigger, the output of which is connected to the input of the low-pass filter, a signal quality evaluation unit and sequentially connected local oscillator, frequency converter, pulse shaper and delay element whose output is connected to the reset input of the clock counter, corresponding to

the outputs of which are connected to the first input, the home of the signal quality evaluation unit, the second and third inputs of which are connected respectively to the inputs of the delay element and the driver pulser, while the second inputs of the elements And are connected to the output of the pulse driver, and the second signal is fed to the input signal. At the same time, the signal quality evaluation unit contains three OR elements, a low-pass filter, three AND elements,

10 three triggers and four decoders, the inputs of which are combined, with the inputs of the first and second decoders connected respectively to the first inputs of the first trigger and the first element OR the output of which is connected to the second input of the first

V5 trigger, the outputs of which are connected respectively to the first inputs of the first and third elements And, and the first input of the second element And the second input of the third element And connected to the outputs of the second

20 trigger, the inputs of which are connected to the outputs of the third decoder and the second element OR, the nerve input of which is connected to the output of the fourth decoder, while the outputs of the first and second elements

And connected to the inputs of the third element OR, the output of which is connected to the first input of the third trigger, the second input and output of which are connected respectively to the output of the third element AND and the input of the low-pass filter, the decoder inputs being the first input of the signal quality estimator, the second input of which are the second inputs of the first and second OR elements, and the second inputs of the first and second AND elements and the third input of the third And elements are the third input of the signal quality evaluation unit. ..,

The drawing shows a structural electrical circuit of a discrete demodulator. A discrete demodulator of frequency telegraphy signals contains a counter of 1 clock pulses, elements 2 and 3 AND, trigger 4, low-pass filter 5, local oscillator 6, frequency converter 7, driver 8 pulses, delay element 9 and evaluation unit 10, signal quality consisting of four AND -14 decoders, elements 15 and 16 OR, triggers 17 and 18, three elements 19-21 AND, third element 22 OR, third trigger 23 and low pass filter 24.

The discrete demodulator works in the following way.

The input signal and the voltage from the output of the local oscillator 6 are fed to the input of the frequency converter 7. The shaper of 8 pulses produces the formation of pulses at the moments of positive zero crossing of the transformed difference frequency. Each pulse from the output of the imager 8 pulses through the element 9 for. The holders set the clock counter 1 to the zero state. From this moment, the formation of the reference interval begins by counting a certain number of clock pulses. The inaccuracy of the reference interval formed in this way due to the asynchrony of the signal that occurs and the clock frequency does not exceed one clock frequency period. In this connection, the value of the clock frequency must be chosen so that the difference in the periods of the converted frequencies of pressing and pressing at least an order of magnitude exceeds the period of the clock frequency. The value of the clock part and the number of bits of the counter 1 clock pulses are chosen so that. the time interval from the setting of the zero clock counter 1 to the change in the state of the trigger 4 of its last bit is equal to the reference interval constituting the period of the average for the converted frequencies of pressing and depressing the frequency. Depending on Bt, whether the reference period of the signal is longer or shorter, the next pulse from the output of the imager 8 pulses passes through element 2 And either element

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3 and, on their second inputs, signals are supplied from the antiphase outputs of the last bit of the counter 1 clock pulses. The output signals of elements 2 and 3 I control the state of flip-flop 4 with separate inputs, whose output is connected to a low-pass filter 5. where averaging is performed on the sending interval of private decisions on each period of the Signal frequency after passing through the frequency converter 7. The delay element 9 is designed to reset the counter of 1 clock pulses and begin the formation of the next Reference interval. After the element 2 AND or element 3 AND, defining the previous partial solution, is triggered.

The signal quality is estimated by the deviation of the instantaneous frequency of the signal from the nominal values of the press and release frequencies. When a deviation exceeds the allowable value, an erase signal is generated. Simultaneously with setting the counter 1 of clock pulses to the zero state. The trigger switches 17 and 18 are reset to the initial state by a pulse from the output of delay element 9, passing through elements 15 and 16 OR, respectively. Decoders 11 and 12 generate pulses at time points corresponding to the beginning and end of the allowable zone for the edges of the pressing signal, and decoders 13 and 14 are for the edges of the pressing signal. Triggers 17 and 18, controlled by separate inputs by signals from the decoder outputs, determine the state of elements 19-21 I. When a pulse from the output of the former 8 pulses falls into any of the allowed zones, the output signal of element 19 AND or element 20 AND through element 22 OR sets the trigger 23 to the state corresponding to the absence of an erase signal. Otherwise, the output signal of the elements 20 I, to the inputs of which the inverse outputs of the flip-flops 17 and 18 are connected, sets the flip-flop 23 to the opposite state. The filter 24 of the lower frequencies produces averaging on the interval of sending signals from the output of the trigger 23.

The choice of the frequency of the local oscillator 6 and the frequency of the signal after frequency conversion is determined by the permissible telegraph distortions due to the time sampling of the analysis, the magnitude of which varies within one period of the converted frequency.

Claims (2)

Introduction to the device of new elements and interrelations between them leads to the fact that in the proposed demodulator the frequency is reduced by means of a heterodyne conversion, and the decision is made on the basis of a comparison of the duration of the full perb signal after the conversion with the reference time interval, unlike the known discrete demodulator where the frequency reduction of the input signal is produced by dividing the frequency, and half the frequency period is subjected to a comparison with the reference time interval. With decreasing frequency by dividing, an increase in the difference in the periods between the frequency of the signal and the reference time interval occurs in proportion to the division ratio. As the frequency decreases by heterodyne conversion, the increase in the difference of the corresponding time intervals occurs in proportion to the square of the frequency reduction factor. With equal values of the signal frequency after frequency division in the known device and after frequency conversion in the proposed device, the difference TJ. the compared time intervals in the proposed yctow are 2N times longer than the known ones, which is confirmed by the ratio% 4- ffer T "- 2NS: a.yuo.t, where FC is the frequency of the signal at the output of the converter in the known device; RPR - intermediate frequency at the output of the converter, is equal to the sum of the frequencies of pressing and pressing. Therefore, in the proposed device, the clock frequency and the speed requirements of the chips used can be reduced by 2 N times. It becomes practically feasible to perform a demodulator with small manipulation indexes on modern logic elements. ,, By reducing the maximum operating frequencies, the power consumed by the demodulator is reduced. Introduction to the discrete demodulator of the signal quality estimator allows erasing invalid characters. t-tgcht1t-nd tt. , gn ..... which leads to an increase in the reliability of reception when using correction codes. The device has the ability to quickly change the erase thresholds by changing the internal logic of the decipherors. Claims 1. A discrete demodulator of frequency telegraphy signals containing a clock counter, the outputs of which are connected to the first inputs of the And elements, the outputs of which are connected to the inputs of a trigger, the output of which is connected to the input of a low-pass filter, characterized in that, in order to increase the noise immunity , a signal quality evaluation unit and a serially connected local oscillator, a frequency converter, a pulse shaper, and a delay element whose output is connected to the reset input of the counter are entered clock pulses, the corresponding outputs of which are connected to the first input of the signal quality estimator, to the third and third inputs of which are connected the outputs of the delay element and the pulse generator, respectively, while the second inputs of the And elements are connected to the output of the pulse shaper, and the second input is fed to the second frequency converter input signal. 2. The device according to claim 1, characterized in that the signal quality evaluation unit comprises three OR elements, a low-pass filter, three AND elements, three triggers and four decoders, the inputs of which are combined, with the outputs of the first and second decoders being connected to the first inputs respectively the first trigger and the first element OR, whose output is connected to the second input of the first trigger, whose outputs are connected respectively to the first inputs of the first and third elements AND, and the first input of the second element AND and the second input of the third element AND Connected with the outputs of the second trigger, the inputs of which are connected to the outputs of the third decoder and the second element OR, the first input of which is connected to the output of the fourth decoder, while the outputs of the first and second elements AND are connected to the inputs of the third element OR, the output of which is connected to the first input of the third trigger The second input and output of which are connected respectively to the output of the third element and the input of the low-pass filter, and the inputs of the decoders are the first BXQovi iTLi pagti gKg fTO n Tf af Tii-i Dv / 4 home block signal quality Ki, the second input of which are the second inputs of the first and second OR elements, and the second inputs of the first and second AND gates, and a third input of the third AND gate are third input signal quality estimation unit. Sources of information taken into account in the examination 1. Mashbits LM Digital signal processing in radio-telephony communication. M., “Holy, 1974, p. 50 (prototype).