SU691831A1 - Data exchange device - Google Patents

Description

(54) DEVICE FOR DATA EXCHANGE

I

The invention relates to the field of computer technology, in particular, to exchange devices and can be used to control the transfer of information between elements of computer systems.

A device for data exchange is known comprising OR schemes, groups of reception gates, groups of transfer gates, priority scheme, group of transmission readiness keys, group of error keys, group of reception prepared keys, first, second and third groups of control keys, group of transmission end keys, group feature keys 1.

The device allows the exchange between several subscribers, but the disadvantage of it is that its implementation requires large equipment costs.

The closest to the invention in terms of technical significance and the achieved result is a device for data exchange, containing a block for resolving allowed calls, the inputs of which are the first group of device inputs, a switch, information inputs L1.1 inputs

which are, respectively, the second group of inputs and the first group of device outputs, the control unit, the first output of which is connected to the control input of the priority block, the first and second registers, and the second output of the control unit is connected to the control inputs of the first and second registers, and the output of the second the register is connected to the first1: m control, the input of the switch, and to the output of the device 2J.

A disadvantage of this device is the provision of information transfer at any time moment only between two subscribers of the computing system, and the remaining subscribers, ready for the exchange of information, are idle in the queue at this time point. This significantly reduces the bandwidth of the device, which leads to a decrease in the performance of the computing system as a whole.

The purpose of the invention is to increase the capacity of the device.

The goal is achieved by the fact that the device contains a block for allocation of parallel transmissions and a block for generating addresses of subscribers-transmitters, moreover

AND

The groups of request, address indicative outputs of the block of allowed calls are connected respectively to the first, second and third groups, the control of the AppleHx inputs of the Apple allocation of parallel transmissions, the code output groups and the code inputs of the block of the block of allowed calls are connected to the corresponding groups of code inputs and the corresponding groups the code outputs of the block of allocation of parallel transmissions, respectively, the group, the address outputs of the block of allocation of parallel transmissions are connected to the corresponding by their groups of code inputs of the block of formation of addresses of subscribers 1 transmitter, a group of request outputs of a block of allocation of parallel transmissions is connected to a group of inputs of a priority block whose outputs are connected with a group of permitting inputs of a block of formation of addresses of subscribers of a transmitter, group of informational, group of address transmission of parallel transmissions connected to the corresponding groups of bit inputs of the first register, the output of which is connected to its second control input of the switch, the third and the third outputs of the control unit are connected to the control inputs of the parallel transmission allocator and the subscriber transmitter address generation unit, and the outputs of the subscriber transmitter address generator are connected to the bit inputs of the second register. ;

The goal is also achieved by the fact that the block for allocation of parallel transmissions contains registers and groups of elements AND, the bit outputs of each register are connected to the first inputs of elements AND of the corresponding group, the second inputs of elements AND of each group are connected IIIOHbi with the corresponding input of the first group of control inputs of the block, the third inputs of the elements AND of each group are connected to the corresponding inputs of the second group of control inputs of the device, the fourth inputs of the elements AND of each group are connected to the corresponding inputs By the third group of control inputs of the block, the outputs of elements AND of each group are connected to the corresponding group of address inputs of the block, the bit outputs of each register are connected to the corresponding group of code outputs of the block, and the bit inputs of each register ss1 are connected to the corresponding group of code inputs of the block, controlling block input is connected to register enable entries ....

The goal is achieved also by the fact that the block forming the addresses of subscribers. The combo transmitters contain the elements OR and the elements AND, and the inputs of each element are 69I83I

OR is connected to the corresponding group of code inputs of the block, the first input of each element AND is connected to the output of the corresponding element OR, the second input of each element AND is connected to the corresponding permitting input of the block, the third inputs of the elements AND are connected to the control input of the block, and the outputs of the elements And are the outputs of the block.

FIG. 1 shows a block diagram of the device; in fig. 2 - functional

10 diagrams of a block for allocation of parallel transmissions and a unit for generating addresses of subscribers-transmitters.

The device for data exchange contains (Fig. 1): registers 1, 2 block 3 allocation of authorized calls, block 4 priority, block .5 allocation of parallel transmissions, control block b, switch 7, block 8 forming addresses of subscribers Transmitters, output 9, 10 - subscribers, and the registrar of the subscriber's application code, the 12-O register of the subscriber's load code, 13 — the input register of the subscriber, 14 — the output register of the subscriber.

In addition, the device has the first group of inputs 15, the second group of inputs 16,,

 group B) e1x6dov 17. In FIG. I marked 18 - group of request outputs, 19 - group of address outputs, 20 - group of indicative outputs, 21 - groups of code inputs, 22 - groups of code outputs of the block

P generation of addresses of subscribers-transmitters, 23 - group of request outputs, 24- .. groups of address outputs, 25 - groups of code inputs, 26 - groups of code outputs of the block of allocation of parallel transmissions. . ,, .

5 In FIG. 2 designates: 27 - registers, 28 - elements AND, 29 - elements OR, 30 - elements AND, the remaining symbols are similar to those in FIG. one..

The device works as follows ;; . :;,; : ;;; ... ;;. .-: .. .. -:

Claims (3)

The block of allowed calls 3 receives requests from all subscribers 10, and the name from the code register of application 11 is the address a6oHeHta, which the subscriber wishes to call to transfer information. This address is decrypted and written into one of the bits of the address register, the return of block 3 (not shown in Fig. 2). The fact of processing of any abo nent with the transfer of information information is also recorded as a unit in one of the register bits of the block 3 block (not shown in fig. 2). In addition, from the register of the load code 12 of all subscribers 10, a unit is recorded in the corresponding occupation register bit in block 3 (not shown in Fig. 2) if the subscriber 10 is free. Thus, the block allocation of allowed calls 3, as in the known device. allocates separately subscribers, ready to transmit information (outputs 18, 19) and separately subscribers, ready to receive information (outputs 20). At the same time, addresses for transferring information after decoding are received from the block of allocation of allowed calls 3 to registers 27. Each register 27 is assigned to only one of its subscribers and has a Q p − 1; where n is the number of subscribers. The codes of transfer-specific pairs, which are being prepared for reception, are allocated on them. The information accumulated in the block of allocation of allowed calls 3 (outputs 18, 19, 20 having a size equal to the number of subscribers), as well as on registers 27 in the block of allocation of parallel transmissions 5, goes to a group of elements 28, on which a code is generated corresponding to the group subscribers assigned to work on parallel reception. The total number of elements And 28 is determined by the formula N n (n-1), where n is the number of subscribers. This code enters the c8 block and the register 1. In view of the fact that several subscribers can simultaneously access the same subscriber and the allocation unit of parallel transmissions 5 allocate several pairs of subscribers with the same subscriber receiver, the codes of individual communication pairs arrive with the registers 27 of the block allocation of parallel transmissions 5 to the priority block 4, which, as in the known device, according to the established priority, reserves the right to transmit information at the moment only for one of the competing subscribers, imposes It sends information to subscribers with the lowest priority in the form of a parcel zero in block 8 for the bit orders corresponding to the subscribers with the lowest priority. , Block 8, based on the signals that match the allocation block of parallel transmissions 5 to the elements OR 29 and with the priority block 4, forms. on the elements And 3 code of the group of subscribers allocated to the parallel transmission of information. The number of elements OR 29 and the number of elements AND 30 is equal to the number of subscribers. The code formed in block 8 enters the register 2, at the output of which buses are driven that correspond to the subscribers currently allocated for information transfer. The signals from the output of register 2 are sent to excited switches to switch 7 (see Fig. 1) and provide selection of inputs of the second group of 16 inputs connected to output registers 14 of subscribers 10 for parallel transmission of information. At the same time, the same signals arrive at the input registers 14 of the subscribers allocated for the parallel transmission of information as a response signal and give permission to change information on these output registers 14. The code of the group of subscribers allocated by the selection unit of the parallel transmissions 5 to receive the information goes to Register I, at the output of which busses are excited that correspond to the subscribers currently allocated to receive information. The signals from the output of register 1 by the excited women arrive at the switch 7 and ensure the selection of three inputs of the group of outputs 17 connected to the input registers of 13 subscribers 10 for parallel reception of information. The control unit 6 forms a cycle of operation of the device, generating successively controlling influences, which are fed to the allocation unit of parallel transmissions 5, priority block 4, block 8 and registers 1,2 .. In order to avoid re-organizing parallel transmission of information, groups of subscribers allocated in the previous cycle of operation, they are blocked by signals received from registers 27 of the block for allocation of parallel transmissions 5. These signals to a group of corresponding selected pairs of subscribers are sent to the control input of the block Highlighted resolved appeals 3.. Thus, the block of allocation of parallel transmissions 5 provides for the allocation of two groups of subscribers, between which information transmission is necessary and possible at the moment, and also forms a code, groups of subscribers selected for parallel reception of information. The block of forming the addresses of the subscribers-transmitters generates the code of the group of subscribers allocated to the parallel transmission of information. The introduced blocks and functional links ensured the allocation of two groups of subscribers and the parallel transmission of information between these groups. With such an organization of information transfer between groups of subscribers, along with the formation of groups of subscribers combined with it, cases of just subscribers in the queue waiting to transmit information are excluded. This significantly increases the bandwidth of the device. Claim 1. A device for exchanging data containing an allow access selection block whose inputs are the first group of device inputs, a switch, information inputs and outputs of which are respectively a second group of inputs and the first group of device outputs a control unit whose first output is connected to the control input of the priority block, the first and second registers, with the second output of the control terminal connected to the control inputs of the first and second registers, and the output of the second register connecting with the first control input of the switch and with the output of the device, characterized in that, in order to increase throughput, it contains a block for allocating parallel transmissions and a block for generating addresses of subscribers-transmitters, moreover, groups of request, address and indicative outputs of the allocation block connected, respectively, with the first, second and third groups of control inputs of a block for allocation of parallel transmissions, a group of code outputs, and a group of code inputs of a block for the allocation of allowed calls; Dineny with the corresponding groups of code inputs and with the corresponding groups of code outputs of the block for allocation of parallel transmissions, respectively, groups of address outputs of the block of allocation of parallel transmissions connected with the corresponding groups of code inputs of the block of formation of addresses of subscribers-transmitters, group of request you: moves of the block of allocation of parallel transmissions connected to the group of inputs of the priority block, the outputs of which are connected to the group; Allowing the inputs of the subscriber-transmission addresses forming unit, the information group, the groups of the address outputs of the allocation unit of parallel transmissions are connected to the corresponding groups of bit inputs of the first register whose output is connected to the second control input of the switch, the third and fourth outputs of the control unit are connected to control corresponding inputs of the block of allocation of parallel transmissions and the block of generation of addresses of subscribers-transmitters, and the outputs of the block of formation of addresses. Transmitters are connected with bit inputs of the second register. 2. A device according to claim 1, characterized in that the block for allocation of parallel transmissions contains registers and groups of elements AND, and the bit outputs of each register connected to the first inputs of elements AND of the corresponding group, second inputs of elements AND of each group are connected to the corresponding input of the first group of control inputs of the block, third inputs of elements AND of each group are connected to corresponding inputs of the second group of control inputs of the device, fourth inputs of elements AND of each group are connected with the corresponding inputs of the third group of control inputs of the block, the outputs of the elements AND of each group are connected to the corresponding group of address outputs of the block, the bit outputs of each The second register is connected to the corresponding group of code outputs of the block, and the bit inputs of each register are connected to the corresponding group of code inputs of the block, the control input of the block is connected to the enabling inputs of the registers. 3. The device according to claim 1, characterized in that the block forming the addresses of the transmitter subscribers contains the elements OR and the elements AND, the inputs of each element OR are connected to the corresponding group of code inputs of the block, the first input of each element AND is connected to the output of the corresponding element OR, the second the input of each element And is connected to the corresponding permitting input of the block, the third inputs of the elements And are connected to the control input of the block, and the outputs of the elements And are the outputs of the block. Sources of information taken into account in the examination 1. USSR author's certificate number 481895, cl. G 06 F 3/04, 1975. 2. USSR author's certificate No. 444062, cl. G 06 F 9/00, 15/16, 1974 (prototype).