SU661514A1

SU661514A1 - Device for measuring dynamic characteristics of logic units

Info

Publication number: SU661514A1
Application number: SU762378920A
Authority: SU
Inventors: Олег Петрович Архипов; Владимир Григорьевич Ермаков; Аркадий Алексеевич Мельников; Алексей Гордеевич Рыжевский
Original assignee: Пензенский Филиал Всесоюзного Научно-Исследовательского Технологического Института Приборостроения
Priority date: 1976-07-05
Filing date: 1976-07-05
Publication date: 1979-05-05

Description

Изобретение относитс к области измерительной техники и может быть использовано дл измерени динамических параметров микросхем.The invention relates to the field of measurement technology and can be used to measure the dynamic parameters of microcircuits.

Известно устройство дл измерени динамических параметров логических схем на основе кольцевого генератора 1.A device for measuring the dynamic parameters of logic circuits based on a ring generator 1 is known.

Однако такое устройство может быть применено дл измерени параметров тольK (t,комбинационных микросхем.However, such a device can be used to measure the parameters of only K (t, Raman chips).

Наиболее близким по технической сущности к изобретению вл етс устройство 2, содержащее последовательно соединенные переключатель, диск.риминатор, блок временной зад ержки и индикатор, причем второй вход дискриминатора соединен с выходом источника напр жени . The closest to the technical essence of the invention is a device 2, comprising a series-connected switch, a disc. A minimizer, a time delay block and an indicator, the second input of the discriminator connected to the output of a voltage source.

Недостатком этого устройства вл етс невозможность контрол динамических .параметров микросхем с пам тью.A disadvantage of this device is the inability to control the dynamic parameters of memory chips.

Целью изобретени вл етс расширение области применени устройства.The aim of the invention is to expand the field of application of the device.

Эта цель достигаетс тем, что предложенное устройствосодержит формирователь установочных последовательностей входных сигналов, вход которого подключен ко втоThis goal is achieved by the fact that the proposed device contains the driver of the installation sequences of input signals, the input of which is connected to the second

рому выходу блока временной задержки, а выход - ко входу переключател .The output of the time delay block and the output are to the input of the switch.

Структурна схема устройства изображена на чертеже; где обозначены блок временной задержки 1, представл ющий собой цепь последовательно соединенных логических блоков (микросхем) 2, объект контрол 3, переключатель 4, дискриминатор 5, источник напр жени 6, индикатор 7,формирователь установочных последовательностей входных сигналов 8 и счетчик циклов 9.The block diagram of the device shown in the drawing; where the time delay block 1 is indicated, which is a series of serially connected logical blocks (microchips) 2, a control object 3, a switch 4, a discriminator 5, a voltage source 6, an indicator 7, a driver of installation sequences of input signals 8 and a cycle counter 9.

Переключатель 4 состо щий из ключей 10 и 11 элемента И 12.The switch 4 consists of keys 10 and 11 of the element I 12.

Дискриминатор 5 с источником напр жени 6 предназначены дл фиксации времени задержки срабатывани устройства на различных уровн х входного сигнала дискриминатора .A discriminator 5 with a voltage source 6 is intended for fixing the device response delay time at different levels of the discriminator input signal.

Claims

The imaging unit 8. serves to form and input into the object 3 an input signal sequence, which brings the elements of the internal memory of the object into a state that ensures the passage of the signal of the ring oscillator, which is formed by the device and the tested block. The counter 9 is designed to control the switch 4, which forms the "small or" large generator ring by switching off or on the object circuit. Block 1 represents the e ect of successively connected Delay line elements with a delay time equal to the sum of the time delays of the blocks (microchips) and the inverting amplifier, providing a balance between the amplitudes and phases of the ring oscillator. The device works in the following way. The measurement cycle of the dynamic parameters of electronic components consists of two cycles. The generator mode of the ring in the first cycle is ensured by observing the oddness of the sum of the inversions of the inverting circuits constituting the small ring of the generator. The counter 9 does not start, and the signal from its zero output switches the small ring of the generator, opening the key 10. The signal period of the ring oscillator is determined by the delays introduced by block 1, driver 8, key 10, element 12 and discriminator 5. In the second cycle In addition to the first condition, it is necessary to ensure the passage of the ring generator signal through the object by setting its internal memory elements to the appropriate state. For this, for the time of installation, generation is maintained in the "small ring, and after the installation is completed, the" small ring is broken and the large generator ring is switched. In this device operation cycle, the signal from the zero output of the counter 9 commutes the small ring of the generator until the end of the input of the installation sequence of signals, and since the end of the signal from the zero output of the counter. 9 is removed and a signal is issued from its single output, which opens the key 11 and commutes the "large ring of the generator. The period of the large generator ring is determined by the delays introduced by block 1, the driver 8, the object, key 11, the element 12 and discriminator 5. Indicator 7 records the value of the difference between the periods of generation of the large and the small rings of the generator. The obtained value of the difference is proportional to the object delay time. Thus, the use of a former 8 and a counter 9 allows this device to be used to measure the dynamic parameters of logical blocks with memory and to provide dynamic control of medium and large integrated circuits. Apparatus of the Invention A device for measuring dynamic parameters of logical blocks comprising a switch, a discriminator, a time delay block and an indicator connected in series with a second discriminator input connected to an output of a voltage source, characterized in that, in order to expand the field of application of the device sequences of input signals, the input of which is connected to the second output of the time delay block, and the output to the input of the switch. Sources of information taken into account in the examination 1. USSR author's certificate No. 432431, M. Cl. 2 G 06 F 15/46, 1972. 2. Author's certificate of the USSR No. 506813, M. Cl.

2. G 01 R 31/28, 1975.