SU646425A1 - Flip-flop with power supply breaker - Google Patents

Description

(54) POWERED BREAKER TRIGGER

one

The invention relates to computing and automation, can be used in electronic devices for numerical control of machine tools.

Known dynamic trigger on. Based on a blocking generator, consisting of a single transistor with parallel connection of a storage capacitor, a transformer, the secondary windings of which are used as output to create a feedback | d.

In this trigger, the storage capacitor is connected directly to the input circuits, so when switching over to the trigger, a large current from the input source is consumed.

A two-stable trigger with a power converter based on a symmetric static two-transistor trigger with collector resistors on a clock-base crossover is known.

resistor connections, containing a storage capacitor connected between one of the outputs of the said symmetric trigger and the Commutator collector; This capacitor is a transistor of a different type of conductivity, the base of which is connected to the housing 2.

The disadvantages of the trigger are low noise immunity and high power consumption.

The purpose of the invention is to increase noise immunity and reduce power consumption.

This goal is achieved by the fact that in a trigger with a power interrupter, with two transistors with collector-base cross connectors and connections, the collectors of transistors are connected to the power bus, storing the capacitor, one output of which is connected to the collector of one transistor and the other through the collector-base transition

a razistor of a different type of conductivity with a common bus; the emitter of an additional transistor is connected to the emitters of the razistor of a trigger.

The drawing shows pripipipapa on the trigger pattern.

In this scheme, a symmetrical static two-transistor trigger 1 with collector resistors is connected to the power supply 2, and the commutator-basic connection resistors have the installation inputs 3, and its common (emitter) 4 is connected to the emitter of the additional transistor 5 of a different conductivity type, the base of which connected to the body. Between one of the conclusions of the symmetric trigger 1 and the collection of the transistor 5, the memory capacitor 6 is turned on.

The proposed trigger works in the following way. The bus 2 is supplied with a sequence of feed pulses (of a positive polarity for the transistor resistance indicated in the circuit. If the storage capacitor is discharged, but (the setting pulses are absent, with the appearance on the bus 2 1 power supply pulse the growth of the voltage between the collector and the emitter of the right transistor of the trigger 1 slows down, therefore the right transistor opens, which goes into saturation, the cut-off of the left transistor and the close to zero difference of potentials on the capacitor plates. A similar manifestation of the trigger condition continues until a positive pulse arrives at the left setup input of pair 3 ( and a power pulse causing the left transistor to be unlocked and the right one to be locked. A capacitor is charged through the collector resistor of the busbar 2 (the collector junction of transistor 5 has a low resistance for positive pulses.) With the arrival of power pulses, the left transistor of the trigger 1 is applied positive capacitor voltage. Therefore, the charge of the ETO1-O capacitor is continuously regenerated. is rivaled. Change the state of the trigger by bit .; a capacitor, for example, using an installation

pulse applied to the base of the right transistor.

Tranzirtor 5, switching kovde sator, plays the role of a valve. Through his

the collector junction is flowing through the {te current pulses, which charge the capacitor. In the interval between the power pulses, the charge of the capacitor is ampa-i but is saved due to the fact that

the bottom plate is charged negatively with respect to the collector of the p-f | -p transistor 5 and the collector junction nose-; the latter is locked.

Thanks to the fact that the current emitter

the transistor .5 switching capacitor, is equal to the total consumption pulse of the symmetric trigger, is achieved as the optimal mode

operation of the transistor 5, and the decrease in power consumption.

In addition, the voltage drop across the emitter junction of the transistor 5 acts as a reverse voltage on the emitter junction of the locked transistor. A symmetrical trigger when a base pulse is applied to the base transistor. This increases the noise immunity of the device.

Claims (2)

1. Fillipov A. G. Transistor dynamic elements of a digital computer. Ow. Radir, M., 1969, p. 22-23, Fig. 22 , 2. US patent number 3510789. 307-238, 05.05.70.