SU643866A1 - Multifunction module - Google Patents

Description

(54) MULTIFUNCTIONAL MODULE

I

The invention relates to the field of computer technology and is intended to be implemented by adjusting all logical formulas of six or less letters presented in disjunctive normal form (DNF). A multifunctional module is known that implements logical functions 1

However, this module does not allow realizing all DNFs from a large number of letters, for example, from five or six.

The closest technical solution to the present invention is a multifunctional module containing logical elements AND, OR, 12 external terminals and realizing by tuning all non-repetitive DNF of 5 letters 2 ..,

Its disadvantage is low reliability, since when a module is implemented in the form of integrated circuits, reliability is mainly determined by the number of external leads.

The purpose of the invention is to increase the reliability of the module.

The goal is achieved by the fact that the inputs of the first element I are connected to the first and second inputs of the module; the inputs of the second element And are connected to the third and fourth inputs of the module; the inputs of the first element OR are connected to the fourth and fifth inputs of the module; the inputs of the third element I are connected to the fifth and next inputs of the module; the inputs of the fourth element And the second element OR are connected to the third and sixth inputs of the module; the first input of the fifth element AND is connected to the output of the first element AND, and the second input of the fifth element is connected to the third input of the module, the first inputs of the sixth element AND and the third element OR are connected to the output of the first element AND, and the second inputs of the third and sixth elements are connected to the output of the second element And the third input of the third element OR. connected to the output of the third element And, the first input of the seventh element And connected to the fourth input of the module, and the second input is connected to the output of the third element And; the first, second, third, fourth inputs of the fourth element OR are connected respectively to the outputs of the first, second OR elements, the first, second module inputs, the inputs of the fifth OR element are connected to the outputs of the first OR element and the fourth And element, the inputs of the eighth AND element are connected with the outputs of the first element And the second element OR; the inputs of the ninth element And are connected to the outputs of the fifth and seventh elements And; the inputs of the sixth element OR are connected to the outputs of the third and sixth elements AND; the inputs of the tenth element AND are connected to the output of the third element OR and the seventh input of the module; the inputs of the seventh element OR are connected to the output of the fifth and seventh elements AND; the inputs of the eleventh element AND are connected to the output of the fourth element OR and to the seventh input of the module; the inputs of the twelfth element And are connected to the output of the sixth element OR and the seventh input of the module; the first, second, third inputs of the eighth element OR are connected respectively to the outputs of the eighth and eleventh elements AND and the fifth element OR; the inputs of the ninth element OR are connected to the outputs of the ninth and twelfth elements AND; the inputs of the thirteenth element I are connected to the output of the eighth element OR and the eighth input of the module; the inputs of the fourteenth element And are connected to the output of the ninth element OR and the eighth input of the module; the first, second, third inputs of the tenth OR element are connected respectively to the outputs of the tenth and thirteenth elements AND and the seventh element OR; the outputs of the fifteenth element And are connected to the output of the tenth element OR and the ninth input of the module; the inputs of the eleventh element OR are connected to the outputs of the fourteenth and fifteenth elements AND; the output of the eleventh element OR is connected to the output of the device. The device shown in the drawing. Labels are used; module inputs -1,2,3,4,5,6,7,8,9: elements I-10, 11,12,13,14,15,16,17,18,19,20,21, 22, 23,24,25; OR elements - 26, 27, 28,29,30,31,32,33,34,35; device output 36. The device structure is described by the zero function of nine variables, r (2., ..., Z9) 42i22 3242.526V (2, VV (Z.:2.2 ..., MZf, VZ2, Z V2; 4YZ , 5V (74iY22VZ3VZ4VZ5V Z6),. The operation of the device in various tuning modes for the implementation of all 11 representatives of the 6 letter letters Duplicate DIF types is described in Table 1.

From the data table. 1 it follows that the proposed device has 9 inputs and 1 output and implements by configuring any of the 11 representatives of non-repetitive DNF of 6 letters.

Reducing the number of external logical conclusions (Yu instead of 12) leads to an increase in the reliability of the proposed device with respect to the known

From tab. 2 it follows that inputs 1,2, 3,4,5, when implementing non-repeating DNF of 5 letters, can be used only as information, and inputs 6,7,8,9 only as tuning. The device is configured to implement a 5-letter DNF by fixing the inputs with constants, which allows the module to be configured to implement this class of formulas by using the ROM.

Thus, this device can be used to implement unattended DNFs of 5 or less letters in systems with separate information and tuning fields, which expands its scope with respect to the prototype.

Since the proposed device realizes all representatives of the types of non-repetitive DNFs of 6 or less letters, with the equal availability of direct and inverse outputs of information sources and the possibility of identifying device inputs, it also allows for arbitrary (including repeated) DNFs of six letters or less.

Example. Implement the repeat DNF wa66yKBV-yi Xt 2 ,. via

when implementing DNF of the specified number of letters.

In addition, the proposed device implements by configuring any representative of the types of non-repetitive five-letter DNFs, provided that the information and configuration inputs are independent

The data of the device are given in table. 2

Table 2

proposed device. When setting 2icj-i, 2,, 2-j 1 device implements (formula TQ-Z Z Z ZJ VZ Z. When

  X ",, 25 the device implements the given formula.

Claims (1)

1. USSR Author's Certificate No. 257867 q 06 F 7/00, 1968. 2, USSR author's certificate. No. 269399 Q 06 F 7 / OOD968. 2k & I : fl 55 3ff yy iPTF 3Z -fli