RU1817087C - Multifunctional module - Google Patents

Abstract

The invention relates to computer technology and is intended to implement logical formulas of six or less letters represented in disjunctive normal form. The aim of the invention is to simplify. The device contains inputs of module 1-9, elements AND 10-19, elements OR 20-24, module output 25. The proposed module allows you to implement by building all logical formulas from six or less letters, 1 ill., 2 tables.

Description

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The invention relates to computer technology and can be used in automation devices, information receiving and processing devices, instrumentation, and is intended for implementation by setting all logical formulas of six or less letters represented in disjunctive normal form (DNF).

An object of the invention is to simplify a module.

The device shown in the drawing. It contains the inputs of module 1-9, elements AND 10-19, elements OR 20-24, the output of module 25.

The structure of the device for writing off the Boolean function of nine variables:

F (zi, ..., zg) zszetze v zg) v ziZ2Z3Z4 (zsze vzg)

Z8Z9 (Z3 V Z4 V Z5 V Z &) V Z7Z8 (Z2 VZ4 V Ze) V Z1Z2Z8 Z3Z4Z8 V Z1Z7Z9 V Z1Z3Z5Z7 V Z2Z4Z6Z7

The operation of the device at various tuning modes during the implementation of all 11 representatives of the types of. Repeated DNF of six letters is presented in Table 1.

From the above table 1 it follows that the module has 9 inputs and 1 output and implements by setting any of 11 representatives of unique DNF of 6 letters.

The reduction in the number of AND, OR, logical links and increased performance leads to a simplification of the module and to increased reliability and efficiency in the implementation of DNF from a specified number of letters. In addition, this module implements by configuring any representative of types of non-repeating DNFs of five letters, provided that the information and tuning inputs are independent (Table 2).

From table 2 it follows that the inputs 1-5 in the implementation of non-repetitive DNF of five letters can be used only as information, and inputs 6-9 only as tuning. The device is configured when implementing a DNF of five letters by fixing the inputs with constants, which allows you to configure the module to implement this class of formulas by using ROM.

Thus, the proposed device, as well as the prototype device, can be used to implement non-repetitive DNF and less letters in systems with separated information and tuning fields, but at the same time it is less complex, it is more efficient by reducing the number of AND elements , OR, number of links and increased speed.

Example. Implement repeated DNF of six letters F xiX2vxiX3vx X3 using the proposed device. When setting up

gzN,, the device implements the formula Fa Z1Z2 V Z3Z4 V Z5Z6. At,,,

., the device implements the given formula.

Thus, the proposed device, like the prototype, implements by tuning all logical formulas of six or less letters. At the same time, the proposed module has greater reliability and higher (by 50%) efficiency compared to the prototype due to increased speed and reduced the number of logical elements and the connections between them. Using the present invention, a positive effect can be obtained by reducing the cost of the module and reducing the processing time of information in devices where the claimed module is used.

Claims (1)

SUMMARY OF THE INVENTION A multifunctional module comprising five OR elements and ten AND elements, the first and second inputs of the module being connected to the first and second inputs of the first AND element, the output of which is connected to the first inputs of the second AND element and the first OR element, the output of which is connected to the first input of the third element And, the second input of which is connected to the third input of the module and the first input of the fourth element And, the second input of which is connected to the fourth input of the module and the first input of the fifth element And, whose output is is dined with the first input of the second OR element, the second and third inputs of which are connected respectively to the outputs of the second and third AND elements, the third and fourth inputs of which are connected respectively with the first and second inputs of the third OR element and with the fifth and sixth inputs of the module, the seventh input of which connected to the first input of the fourth OR element, the output of which is connected to the first input of the sixth AND element, the second input of which is connected to the fourth input of the module and the first input of the seventh AND element, the second input of which is connected with the output of the third OR element, the first input of the module is connected to the first input of the eighth AND element, the second input of which is connected to the third input of the sixth AND element, the eighth input of the module and the first input of the ninth AND element, the second input of which is connected to the second input of the first OR element, and with the ninth input of the module, the second input of which is connected to the first input of the tenth element And, the outputs of the fourth, sixth, seventh and ninth elements And are connected respectively to the fourth to seventh inputs of the second OR element, the output of which is the output of the module, characterized in that, for simplicity, the first input of the module is connected to the third input of the third OR element, the fourth input of which is connected to the second inputs of the module and the fourth OR element, the third input which is connected to the sixth input of the module and the second inputs of the fifth and tenth elements. The last output is connected to the eighth input of the second OR element, the ninth input of which is connected to the output of the eighth AND element, the third input of which union of a third input of a ninth AND gate and modulation, a fifth input coupled to a third input of said fifth and fourth input eighth AND elements, the seventh input of the module is connected to the fifth input of the third AND element, with the third inputs of the fourth and tenth elements AND, the fourth input of the last is connected to the eighth input of the module, the fourth and ninth inputs of which are connected to the first and second inputs of the fifth OR element whose output is connected to the second input of the second element I. Table 1 table 2