SU641458A1 - Computer - Google Patents

Description

I

The invention relates to analog computing and can be used in analog computing devices.

Known computing devices

ilb-l One of the known devices ij contains a non-linear converter consisting of a resistor and a diode, an injection diode and a photoresistor.

A disadvantage of this device is its low accuracy, since a functional converter of this type is characterized by a large error. In addition, the resistances of the diode and the photoresistor depend on the temperature, which affects the accuracy of the device.

Another disadvantage of this device is its limited functionality, since it allows only one multiplication operation to be performed.

The closest technical solution to the invention is a computing device 2 containing an amplifier, two chains, each of which consists of a series-connected resistor and a control gain element, the control inputs of the elements with controllable transmission coefficient, are connected to the output of the amplifier.

The device performs only two operations — it multiplies and divides the input voltages. Therefore, the disadvantages of its should include narrow functionality.

The object of the present invention is to enhance the functionality of the device by performing a square squaring operation and square root extraction.

The goal is achieved by the fact that the device additionally contains a comparison circuit connected in series to a generator of linearly varying voltage and a key, a switch, the output of which is connected to one output of the element with a controlled factor

transfer the first chain, the second output of which is connected to the first input of the comparison circuit, the second input of which is connected to the first input of the device, and the output is connected via a switch to the input of the amplifier, the second input of the device is connected to one output of the element with the control gain of the second chain and the first the input of the switch, the second input of which is connected to another output of the element with a controlled transmission coefficient of the second chain, and the third input of the switch is the third input of the device, the other conclusions of the scale resist moat coupled to bus ptentsilpa zero,

The drawing shows a block diagram of the proposed device. It contains a generator of linearly varying voltage 1, switch 2, amplifier 3, which has the property of storing the output voltage, elements with controllable transfer coefficient 4 and 5 (for example, coupled - optocoupler, heating thermistor, two palette transistors, etc. p.) switch 6, comparison circuit 7, large-scale resistors 8, 9 terminals of input signals Yu, 11, 12 terminals of output signals 13, 14. In the scheme, large-scale resistors 8 and 9 have the same ratings and are selected with high accuracy, and controlled resistances also have identical n Transmission characteristics.

In the initial state, the generator of the linearly varying voltage 1 periodically generates a pulse of a smoothly varying voltage, the key 2 is closed by the potential coming from the comparison circuit 7, there are no signals at the terminals of the device.

Consider the work of the device when exposed to a square and division.

The inputs 10 and 11 are supplied with voltage and "Ug, s.respectively, the switch 6 commutes a circuit aS. The key 2 opens and the variable Ngaprc through it enters the input of the amplifier 3, which by its output signal acts on the controlled resistances 4 and 5, smoothly drawing them out. The outputs of the dividers, forming (scaling resistors 8 and 9 and the elements with the control M transfer coefficient 4 and 5, will be

I.

and.

and

,

V r

where r

.R

-resistance 2

com 4,;

R g, 9

- The resistances of the scale resistors 8 and 9 are adequate.

Since RTo, (m. Description about 7 -J-i 2

above; that

.G.

Obviously, MOAiOiiT will occur, the condition will be met

2

:

to,

R. + RC

When this moment comes, the comparison circuit generates the potential at which key 2 closes. The amplifier 3 will store the voltage that acted at its input at the moment equality occurred (1) (to perform the memory operation, it suffices to supply a series-connected diode and capacitance, and the amplifier must have a large input impedance).

Obviously, at the time of storage by the output voltage amplifier, the transfer ratio of the dividers formed by the RV,. , RO.Q will also be constant jy

After equilibrium occurs, the switch commutes the circuit ab. At the entrance of the divider formed by R and will be

 Ug RS

and.

supply voltage R v R (2)

-,

On the output terminal 14 will be eg g.

Ug-U2.

J and.

-R,

Where

and;

Therefore, out and

l “2 g

those. the device allows to square the voltage and divide the result by another input voltage.

If taken constant, the device squares the input voltage and.

With U -con, $ tycTpoftCTBO allows nt to be inverse (Jg.

When extracting a square root, the device works as follows.

The initial state of the circuit is the same as in the previous case. The switch commutes a5 circuit.

The scheme also works as “in the Perov case before the onset of the moment of equilibrium, for which the equalities will be valid.

and

 and, to, and, and

Bblx

out

From these equations, we can write the expression (3). After equilibrium, the switch commutes, switching circuit ag. In this case, the condition Bv. X, 5 will be satisfied with the condition Unv ,, v, U-, -K. But from

Consequently.

and

2)

, - ..

and

e. device aims two

out

input voltage, takes the square root of the result and multiplies it all by the third input voltage.

With (COnCjt, the device takes the square root of the input voltage. With Uj-COnst, the device takes the square root of the reverse of the input voltage

The device multiplies and divides it as follows.

The initial state is as in the first case.

When the circuit is balanced, the condition

,(four)

After that, the switch commutes the circuit of a. Obviously, for this, the equality is true:

| (4 Uvyx / e

K tua

Consequently

Uau

and

and.

OUT,

those. the device multiplies two input voltages and divides by the third voltage. At (J ..- Constj, the device divides two voltages

The multiply and divide operation can be performed in another way. For

THIS is necessary switch put in position ag. After a balanced scheme, two equations can be written.

and, and

 and, to

and

out

From the first equation, the value of K is substituted into the second, after which it will have:

B1X, 2 of

those. the device multiplies the two voltages and divides by the third.

On the basis of the description of the operation of the device, it can be concluded that it greatly exceeds the known computing devices in terms of functionality.

The application of the proposed device, B, where it is necessary to draw a wide range of computational tasks, has a significant economic effect.

F

formula of invention

A computing device containing an amplifier, two chains each of which consists of a series-connected large-scale resistor and a control gain element, the control inputs of the controls with a control gain are connected to the output of the amplifier, characterized in that by performing a squaring operation and extracting a square root, it contains a comparison circuit of a series-connected linearly varying generator the key, the switch, whose input is connected to one output of the element with controllable transfer ratio of the first chain, the second output of which is connected to the first input of the comparison circuit, the second input of which is connected to the first input of the device the amplifier, the second input of the device is connected to one, the output of the element with a controlled transmission coefficient, the second chain and the first input of the switch, the second input is. which is connected to another output terminal with a controllable transfer coefficient of the second chain, and the third input of the switch is the third input of the device, other conclusions of large-scale

The resistors are connected to the zero potential bus.

Sources of information taken into account in the examination:

1. USSR author's certificate number 226288, cl. G06 G 7/16.

2. US patent number 3423579, cl. 235-194, 1969.

EVYHG