SU543000A1 - Differentiation device - Google Patents
Differentiation deviceInfo
- Publication number
- SU543000A1 SU543000A1 SU2083429A SU2083429A SU543000A1 SU 543000 A1 SU543000 A1 SU 543000A1 SU 2083429 A SU2083429 A SU 2083429A SU 2083429 A SU2083429 A SU 2083429A SU 543000 A1 SU543000 A1 SU 543000A1
- Authority
- SU
- USSR - Soviet Union
- Prior art keywords
- differentiation device
- adder
- register
- accuracy
- differentiation
- Prior art date
Links
Landscapes
- Complex Calculations (AREA)
Description
етс потенциал длительностью старших разр дов .The potential is the duration of the higher bits.
Старшие п разр дов по потенциалу со схемы сравнени проход т через элемент И 6 и поступают на сумматор 3, на выходе сумматора 3 формируетс величина , котора The higher potential bits of the comparison circuit pass through the element 6 and arrive at the adder 3, at the output of the adder 3 a value is formed which
, заноситс в регистр 7. Затем процесс повтор етс до тех пор, пока не выполнитс условиеis entered in register 7. Then the process is repeated until the condition
e(V,.e (V ,.
При этом г + With this, g +
искомое значение производной . the desired value of the derivative.
Следует отметить, что при точности пор дка h блок 1 формировани приращений входной функции не используетс , а при реализации точности пор дка h он используетс и представл ет собой совокупность регистра и сумматора.It should be noted that, with an accuracy of the order of h, the unit 1 for forming the increments of the input function is not used, and when implementing the accuracy of the order of h it is used and is a combination of register and adder.
Таким образом, устройство требует дл своей реализации при точности h два сумматора , множительное устройство, регистр, схему сравнени , т. е. его оборудование сокращаетс на 40%, по сравнению с известным. При реализации точности h, расход оборудовани увеличиваетс на сумматор и регистр, но даже и в этом случае устройство оказываетс проще и требует на 20% меньше оборудовани .Thus, the device requires for its implementation with accuracy h two adders, a multiplying device, a register, a comparison circuit, i.e., its equipment is reduced by 40% compared with the known. When accuracy h is realized, the equipment consumption increases by the adder and register, but even in this case the device is simpler and requires 20% less equipment.
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SU2083429A SU543000A1 (en) | 1974-12-13 | 1974-12-13 | Differentiation device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SU2083429A SU543000A1 (en) | 1974-12-13 | 1974-12-13 | Differentiation device |
Publications (1)
Publication Number | Publication Date |
---|---|
SU543000A1 true SU543000A1 (en) | 1977-01-15 |
Family
ID=20603314
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SU2083429A SU543000A1 (en) | 1974-12-13 | 1974-12-13 | Differentiation device |
Country Status (1)
Country | Link |
---|---|
SU (1) | SU543000A1 (en) |
-
1974
- 1974-12-13 SU SU2083429A patent/SU543000A1/en active
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