SU537371A1 - Multichannel converter of an angle of rotation of a shaft in a code - Google Patents

Description

one

The invention relates to the field of computing and can be used in automatic control and measurement systems. I

The known converter of the angle of rotation of the shaft into a code containing phase shifters, zero children, triggers, control gates, counters of coarse and precise readings, and a generator of S-synchronizing pulses 1.

In this converter, the filling of the coarse and accurate readout counters occurs independently of each other, and there is no circuit for transferring the transfer unit between the younger discharge of the coarse counting counter and the highest discharge counter of the exact counting counter.

The disadvantage of this converter is low accuracy.

The closest in technical essence to the device under consideration is a multichannel shaft rotation angle converter into a code containing coarse and precise phase shifters, the outputs of which are connected to the inputs of a group of zero detectors, a pulse generator connected to the first input of the first valve, the second input of which is connected the output of the first trigger, and the first output of the counter of the exact count - with the first input of the register, the counter of the rough count and the encoder 2.

The specified device also does not provide sufficient accuracy.

The purpose of the invention is to increase the accuracy of the converter.

This is achieved by switching switches, an error correction block and an additional counter to the converter. The output of the latter is directly connected to one input of the first and second switches, others

the inputs of which are connected respectively to the outputs of a group of zero detectors, and through an encoder to the first inputs of the second valve, the third switch and the error correction unit, and the outputs of the first and second switches to the first inputs of the first and second triggers respectively. The second input of the first trigger is connected to the output of the third valve, to the first input of the third trigger and to the second input of the second valve, the output of the second valve to the second input of the second trigger, and the output of the second trigger to the first input of the fourth valve, the second input of which is connected to the generator output pulses, and the output - to the first

exact counter reading. The second output of the latter is connected to the second inputs of the error correction block and the third switch, the output of which is connected to the second input of the register, and the third input to the third input

The error correction block and to the first output of the coarse count counter, the second output of which is connected by the third input of the register, and the first and second inputs to the outputs of the first valve and the error correction block, respectively. The output of the power supply unit through the zero detector is connected to the first input of the fifth valve, the second input of which is connected to the output of the fourth trigger, and the output to the first inputs of the third and sixth valves, the second inputs of which are connected respectively to the outputs of the third trigger. The second input of the third trigger is connected to the output of the sixth valve, to the fourth input of the error correction block and to the first input of the fourth trigger, the second input of the last - from the control, their inputs to each counter. The functional diagram of the converter is represented in the drawing. The device contains coarse 1 and exact 2 phase shifters, zero detectors 3, 4, switches 5, 6, 7, encoder 8, additional counter 9, triggers 10-13, pulse generator 14, gates 15-20, error correction block 21, block 22 power, coarse 23 counters and accurate 24 counts, register 25. The outputs of coarse phase shifters 1 and exact 2 counts are connected to zero detectors 3, the zero detector input 4 is connected to power supply unit 22 together with the stator windings of coarse and precise phase counters. The outputs of the zero detectors 3, connected to the coarse phase shifters, are connected to the inputs of the switch 6, and the outputs of the zero detectors 3, connected to the precision phase shifters, to the inputs of the switch 7. Other inputs of the switches 6, 7 together with the encoder input 8 are connected to the output of the additional counter 9, the output of the switch 6 is connected to the first input of the trigger 10, and the output of the switch 7 is connected to the first input of the trigger I. The output of the trigger 10 is connected to the second input of the valve 16, the output of the trigger 11 is the first input of the valve 19, and the first and second entrances of the valves 1 6 and 19 - with the output of the generator 14 pulses. The output of the zero detector 4 is connected to the first input of the valve 15, the second input of which is connected to the output of the trigger 13, the output of the valve 15 to the first inputs of the valves 17 and 18, and the second inputs of the valves 17 and 18 to the outputs of the trigger 12. The output of the valve 17 connected to the first input of the trigger 12, to the second input of the trigger 10 and to the second input of the valve 20, the output of which is connected to the second input of the trigger I. The output of the valve 18 is connected to the second input of the trigger 12, to the fourth input of the trigger 21 of the error correction unit and to the first input of the trigger 13, the output of the tuner 8 - with the first inputs switch 5, the error correction unit 21 and the gate 20. The third and second inputs of the error correction block and the switch 5 are connected between themselves and to the first output of the counter 23, coarse count and a second output meter 24 accurate reading. The output of the block 21 kor- 6 6 error response is connected to the second input of the coarse counter 23, the first output of the counter 24 of the exact count, the output of the switch 5, the second output of the coarse counter to the first, second and third inputs of the register 25. The second input of the trigger 13 St. It is controlled by the control inputs of coarse and accurate counters. The outputs of the valves 16, 19, respectively, are connected to the first inputs of the coarse and precise counters. Switch 5 switches the matching bits of the coarse and accurate count counter at certain inputs of the register depending on the count of the given channel. The switches 6 and 7, in accordance with the channel number of the conversion, switch the signals from the zero detectors associated with the coarse phase shifters and the zero detectors associated with the exact phase shifters, respectively. The error correction block ensures the matching of the counts after analyzing the states of the matching bits of the coarse and accurate counters by changing the state of the corrected bit of the coarse counter. An additional counter determines the number of the conversion channel and controls the operation of the switches 6 and 7, and determines the counting of this channel through the encoder. The converter works as follows. At the output of the power supply unit 22, there are two voltages shifted relative to each other by 90 °. These voltages are applied to the stator windings of phase shifters 1, 2. One of them (reference voltage) is fed to the input of the zero detector 4. The input shaft is connected to the rotor of each phase shifter, the angle of rotation of which must be converted into a binary code. In the drawing, ac, a, z,. .. ayu - angles of rotation of phase shifters “-21, a22,. . ssalg - angles of rotation of phase shifters of exact reference, where N n M is the number of phase shifters, moreover N can be greater or equal. The phase of the voltage removed from the rotor winding of any phase shifter is shifted relative to the phase of the reference voltage by an amount proportional to the angle of the turn, rotor, and hence the input shaft. At the moment of transition of the sinusoidal voltage through zero from the negative half-wave to positive half output wave zero ejectors 3 will appear controlling images arriving at the switches 6, 7. The conversion begins with the arrival of external signals "Start of conversion and input of additional counter 9, to the second trigger input 13 and at the control inputs of the coarse 23 counters and the exact 24 counts. These signals change the contents of counter 9. Calibrating the number of the conversion channel, by one, set the trigger 13 to the position when the valve 15 is open and reset the counters of coarse and precise readings. If the contents of counter 9 correspond to the number of a two-count channel, the output potential of the encoder 20 enters the gate 20, the opibka correction unit 21 and the switch 5. At the same time, the control is the f1 pulse (start-pulse) from the output of the zero detector 4 through the gates 15 and 17 throws the trigger 12 and sets the trigger 10 and through the valve 20 the trigger 11 so that the pulses of the generator 14 through the valves 16, 19, respectively, begin to flow to the first counting inputs of the counters of coarse and precise readings. Filling them ends when the flip-flops 10, 11 are transferred by other control pulses (stop pulses) received at the first inputs of these triggers from the corresponding zero detectors through the switches 6, 7. The outputs of the triggers 10, 11 block the gates 16, 19. Thus, the counters record a number proportional to the time interval between the start-pulse and the stop-pulses. In turn, the time interval is proportional to the phase shift of the voltages of the reference and output from phase shifters 1, 2 of this channel, and hence, the angle of rotation of the input shaft. In accordance with the contents of the additional counter 9, the switches 6, 7 select the stop pulse coming from the output of the zero detector of the corresponding channel, and the tweeter 8 fixes the count of this conversion channel. In error correction block 21, the state of matching bits of the coarse and accurate counters is constantly analyzed. As a result of this analysis, an impulse is sent to the second input of the coarse counter, which either adds one to the content of the coarse counter or subtracts one. The next IMPULSE from the output of the zero detector 4 flips trigger 12. sets trigger 13 to zero, and its output blocks valve 15. This pulse generates a correction pulse at the output of error correction block 21 as a result of analyzing the matching bits of the coarse and accurate counters. The information from the second output of the coarse counter, from the first output of the counter of the exact count, and from the output of the switch 5 is entered into the register 25. From the output of the switch 5, the register 25 records the state of the matching (significant) bits of the counter of the exact count, and the outputs of the matching bits of the counter rough count blocked. After recording the information from counters 23, 24 c from switch 5 to register 25, the conversion cycle on this channel ends, the conversion on the next channel starts with the arrival of successive signals "Start of conversion. Similarly, the converter operates on a single-count channel with the difference that the output of the encoder 8 blocks the second gate 20 and the output of the error correction block 21, and the register 25 records the contents of the (high) bits of the coarse count counter and through the switch 5 the contents of the matching (low) coarse count counter bits. In two-count channels, phase shifters are interconnected by mechanical transmission, the gear ratio of which is equal to the number of information bits of the coarse count counter, not counting the number of matching (low-order) bits. The counting in the proposed Converter is rigidly assigned to each channel number. As can be seen from the description of the operation of the converter, in the two-channel measurement channel, the virtual position of the phasers along the coarse and EXACT channel occurs independently of each other. The younger bit of the coarse counter and the most significant bit of the counter of the exact count vary in the sharply differing boundaries of the taps. Therefore, a change in the value of the reference value of the counter of the exact counter (unit transfer does not always occur with a change in the value of the younger counter of the coarse counter. This measurement error is equal to the "weight of the younger discharge of the coarse reference. In order to reduce this error and make it equal to "Minority weights of the exact reference in the proposed converter. A reconciliation of counts is introduced, which is performed by the error correction block 21. Reconciliation of counts is reduced to the analysis of logical functions contained coarse and accurate count matching bits and code correction in a coarse count code. Coarse count bits allow you to measure the remainder of dividing the measured value in the coarse count channel by the maximum exact count weight. Coordinate bit weights of the rough count must coincide with the corresponding "weights of the highest bits of the counter of the exact Hoio count. Coordination of counts is reduced to an analysis of the states of the matching digits of the coarse and exact readings and the comparison of their difference from the half the maximum "weight of the exact reading of the following logic functions Rc .. F-, which are obtained if the number of matching bits of a rough count is three, and the number of information bits in the counters of a rough count is five, in the counters of exact count nine R - 1.6- (2-7 + 2-3-8 + 3-7.8); .6. (2-7 + 2.3-8 + 3.7-8), where 1, 2, 3, 6, 7, 8 are the unit states of the triggers of 1, 2, 3 bits (senior) of the counter of the exact count and b, 7, 8th bits (minor) of the rough count counter;

T, 2, 3, 6, 7, 8 are the zero states of the indicated triggers.

If the condition of the F + function is satisfied when analyzing the states of matching bits, then "1" is added to the corrected bit of the coarse counter, and if the conditions of the function F-, then "1 is subtracted from the corrected bit.

Analysis of the matching bits of the coarse and accurate readings using the above expressions and the generation of signals for the correction of the content of the information bits of the coarse count counter is performed by the error correction block.

The error in the proposed transducer does not exceed the "weight of the least significant bit of the exact reading, since the correction of the content of the coarse reading counter is carried out. with the contents of the countdown counter.

The use of a shaft rotation angle into a switch code, an error correction block, an additional counter, and corresponding connections between blocks in a multi-channel converter improves the accuracy of the device operation compared to similar devices that solve the same problem.

Claims (2)

1. Drozdov E. A. and others. Automatic conversion and encoding of information. - “Soviet Radio, M, 1964, p. 200 2. Avt. St. No. 437120, cl. G 08C 9/04, 1973 (prototype).