SU445987A1 - Redundant trigger - Google Patents

Description

The invention relates to automation and computing technology.

Redundant triggers are known, containing three triggers connected to error correction logic circuits, the majority element, three power sources, and three diodes.

However, in the absence of voltage at two of the three power sources, there is no signal at the output of the device.

The purpose of the invention is to increase reliability - in that, in the proposed trigger, the positive power supply terminals of the error correction circuits (SIO) of the first trigger are connected to the second power source, the positive ones

The PIC power outputs of the second I trigger are connected to the third power source, the CIO positive leads of the third trigger with the first power source. The positive outputs of the three AND circuits that enter the major element are connected respectively to the first, second, and third power sources, and the positive output of the OR major element is connected via diodes to each of the three power sources.

Diagram of the device shown in the drawing.

The trigger contains triggers I, circuits AND 2-4, inverters 5, circuit OR 6. diodes 7-9.

The primary effect is that the state of each trigger in the information storage mode is determined by the state of the other two triggers, g, e. A vigilant trigger through the AND 2.3 circuitry is controlled by two others. This eliminates the possibility of a separate trigger being triggered in any of the channels.

In the counting mode, the device operates as follows. The counting pulses of the positive field of the rhythms arrive on three channels simultaneously to the inputs of logic circuits AND 2.3 and block them for the duration of the pulse. Through the inverter 5, the same pulses arrive at the counting inputs of three triggers 1, which are triggered by a negative difference in the counting pulses. The delay on the inverter ensures reliable triggering.

In the event of a failure of any two of the three power sources —10 11, 12, the device remains operable. For example, when a short circuit of the power sources 10, 11 is output, the trigger of the third channel continues to operate, since the And 2.3 circuits of this trigger are de-energized and do not affect its operation. The signals from this trigger come to the majority element, which, with this fault, turns into two series-connected inverters.

SUBJECT OF INVENTION

The resected trigger, containing three triggers, is connected to logic circuits, error corrected, majority element, three power sources, three diodes, characterized by the fact that, in order to increase reliability, the positive power supply terminals of the first trigger error correction circuit are connected to the second power source, plus the power supply pins of the second trigger error correction circuit are connected to the third power source, the positive power pins of the third trigger error correction circuit are connected to the first power source, plus e findings three AND circuits majority element connected us respectively with the first, second and third power source and the positive terminal circuits IL majority element coupled through diodes to each of the three power sources. Yu ..-"