SU434332A1 - PHASE CALIBRATOR - Google Patents

Description

one

The invention relates to a phase-measuring technique and is intended to produce two sinusoidal voltages with precisely defined phase relations in a wide frequency range.

Phase calibrators are known that include a generator, scaling circuits, a device for controlling the phase difference of output voltages, and bandpass filters.

The disadvantage of the known devices is low compared with the magnitude of the discrete accuracy and a narrow frequency range. The low accuracy of such devices is explained by the instability of the phase-frequency characteristics of the filters and the short-term frequency instability of the generator.

The purpose of the invention is to improve the accuracy of setting the phase angle, extending the range of operating frequencies and reducing the levels of higher harmonics and their spectra of output signals.

This goal is achieved by the fact that the phase calibrator is equipped with large-scale adders, the inputs of which are connected to the outputs of the scaling circuits and the triggers, the inputs of separate start-ups of which are connected to the outputs of the bits of the scaling circuits.

Ia drawing shows a functional diagram of the device.

The band generator 1 of the device signals is connected to the inputs of non-bandwidth circuits 2 and 3. The circuit for controlling the output voltage of the output voltages is connected to a scaling circuit.

3. In turn, the scale adders 4 and 5 are connected by their inputs to the outputs of counting circuits 2 and (through setting circuit 6) 3, as well as to the outputs of the 7i-TJX and 8i-82K trigger, the separate start inputs of which Dov recalculation schemes.

Forward: rectangular shape with frequency f from band generator 1 is fed to inputs of scaling circuits 2 and 3. The coefficient of dividing the frequency of scaling circuits n is selected based on the specified DFD discreteness value:

360

P

Output voltages of recalculated circuits 2

and 3 with a frequency F - and a duty cycle equal to 2 p

(Fig. 2) are fed to the inputs of scale adders with a scale factor. The phase difference of the output signals is given by circuit 6. Triggers with separate control 7i-72N and 8i-82X, triggered from scaling circuits 2 and 3, respectively, form 2N periodic sequences of square-wave pulses, symmetrical about the middle of the positive and negative half-cycles of the output voltages of scaling channel schemes with duration:

- - L Mr.

at 1/7 / v;

  2 2 (N +1)

, + Pp,

2 2 (; V + 1)

where p is the sequence number of the trigger in the channel.

The output voltages of the flip-flops and 8i and 82N are summed with the output voltages of the scaling circuits 2 and 3 using scale adders 4 and 5, respectively.

Thus, each half-cycle of the output voltages of the phase calibrator is synthesized from the output signals of the scaling circuit and from N square-shaped pulses formed by triggers with separate control.

If the scaling factors of the inputs of the adder are chosen from the condition:

with 1 - jt:

/ One hundred cos

mp

2 (LB 1)

 ° 2) P

then in the output spectrum of the scale adder, the values of N following the first odd harmonics go back to zero. Even harmonics are absent in the spectrum of the output signal due to the symmetry of the shape of the latter relative to the middle of the half period.

The number of extrapolation steps N is chosen based on the requirements for the magnitude of the nonlinear distortion of the output voltages of the phase calibrator.

The subject matter of the invention.

A phase calibrator containing a generator, scaling circuits, a control device for specifying the phase difference, characterized in that, in order to improve the accuracy of setting the phase angle, extending the operating frequency range and reducing the levels of the highest harmonic components of the output signal spectra, the inputs of which are connected to the outputs of scaling circuits and triggers, the inputs of separate launches of which are connected to the outputs of the bits of the scaling circuits.

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