SU408339A1 - FUNCTIONAL TRANSFORMER - Google Patents

Description

one

The invention relates to computational, technical, and techie engineering, and can be used in analogue and analogue-digital computational machines for building controlled functional transformations, reproduced and reproduced in the form of a piecewise-linear function, in addition, in a piecewise-linear function, in addition to a function. - one ipho; maa1, and there, - where high speed and speed of information processing management is required.

Known functional transducers, contain-ingtetifiers, adders, capacitor, input block and clock generator

IM | Pulse.

However, the known devices have a relatively low accuracy of reproduction of a given function.

The aim of the invention is to enhance the operation T01.

For the output, the memory blocks of the number are connected to the first inputs of the respective integrators, the second inputs of which are connected to the output of the character storage unit, and the outputs of the integrators are connected to the vkhado..m sumamator and through the integrating filter to the zero potential bus.

In the drawing, the drawing of the converter circuit.

The functional converter contains a block for inputting information about the numerical values of KO: Effi- cients, a block for storing the sign 2 of the first derivative in K sections, blocks for storing the number 3, a clock pulse generator 4, a transistor integrator 5, an integrating filter 6 and an adder 7.

The device works as follows.

Matching the state. The / input unit, which can be represented as a numeric keypad, is connected to the flea inputs of the memorization of the number 3 and outputs digital information in binary code. The symbolic keys {+, -) are connected to the character storage unit 2, the clock pulse generator 4 is connected) with all storage units andHMH 2 and 3 controlled by the input unit /, providing a single mode for writing information into the memory units and self-oscillating mode during Playback piecewise -linear function. The blocks are remembered by the number 3 and the sign 2 are made on registers with feedback.

The outputs of the memory terminals of the number 3 are connected to the inputs of the transistor integrators 5, and the output of the character storage unit 2 controls the switching on of the charging or discharging parts of the integrators 5 whose outputs are connected to the integrating filter 6 - a capacitor. To the output of the filter 6, plug in an adder 7, which is an emitter signal generator. The currents in the integrators 5 are set so that their weight values increase with the number of the integrator.

D i; n and m 1I h e c s i i p e w i. M. When the clock generator is switched on in the auto mode, a series of clock pulses is sent to memory blocks 2 and 3. The information about the coefficients is filled with binary numbers in them, and these blocks include the corresponding number of integrators 5, currents Which are summed on the integrating filter (J.

A change in the accuracy of a. Pnichimacin (change in the number of nodes) is achieved by changing the number of bits in 1 and 2 in blocks of the memory of 2 and 5.

Changes in the accuracy of specifying the coefficients of the anloximation are achieved by changing the number of these blocks.

Subject invention

A functional converter, an integrator, a sumimator, an Nt-filter, an input unit, the first highlight of which is connected to the clock generator, and the second to the nerve inputs of the number and memory block block, the second inputs of which are connected to the clock generator it has pulses, characterized in that, in order to improve the accuracy of work, in it the outputs of the number memory blocks are connected to the first one and the inputs of the respective integrators, the second Bxoiribi of which are connected to the output of the memory unit a, and the outputs of the integrators are connected to the input of the adder and, through the integrating filter, from the zero potential.