SU406196A1 - DIGITAL CENTERING DEVICE - Google Patents

Description

The invention relates to the field of measurement technology and can be used as a digital high-pass filter, as well as for centering non-stationary random alternating processes. Known digital centering devices containing a digital aperiodic link of the 1st order. These devices also contain a large amount of equipment, including multi-bit registers, adders, a large number of multi-bit gates and assembly circuits. The purpose of the invention is to simplify the device. For this purpose, a digital subtraction unit with two inputs is introduced into the digital centering device, sequentially connected by one of the inputs to the output of the aperiodic link of the 1st order. In this case, the device input is connected to the input of the aperiodic link and the second input of the subtraction link. The block diagram of the digital centering device shown in the drawing. The digital centering device contains a digital aperiodic link of the 1st order of 1; the digital subtraction link 2 n + t + 1 - bit adder 5 is connected by the inputs n of its younger bits to the n outputs of group 4 of the two-input “OR aperiodic link, inputs t + 1 of its senior bits with tt + 1-m output of group 4 “OR” circuits, and the outputs of the inverse code +1 of the most significant bit — with inputs n + of bit register 5, and with one of the inputs, 6 two-input circuits “OR subtraction link” are grouped. The outputs of register 5 are connected to one of the inputs of the circuits “OR pryipe 4. The inputs n + of the discharge adder 7 are connected to the outputs of the circuits“ OR group 6, and the outputs to the output terminals of the device 8. The second inputs of the circuits “OR groups 4 and 6 are connected to the information inputs 9 of the device. Adders 5 and 7 and register 5 are provided with sign triggers, with a single output of the highest bit of each adder through a counting input and a single output of a sign trigger connected to the input of a lower bit. The output of the inverse code of the trigger of the character of the adder 3 is connected with the inputs of the trigger of the sign of the adder 7 and register 5, and the output of the direct code of the register 5 is connected with the input of the trigger of the sign and m higher digits of the adder 5. In order to simplify the drawing of the sign triggers and their zi on the flowchart not shown. Input terminal 10 is connected to the interrogator of the interrogation of the inverse code of the adder and its sign trigger. Input terminal 11 is connected to the polling buses of direct adder codes

7 and register 5 and their sign triggers. Input terminal 12 is connected to the reset shiaami of the adder 7, register 5 t of their sign triggers.

Discrete Xg of the process under study is fed to p + input terminals 9, n + 1- the terminals of which are connected to the counting inputs of flip-flops, the sign of adders 3 and 7. If, then the n + J-yro sign terminal is marked with code "zero, and per hectare Junior terminals 9, the number Xi is fed in the n ode. If, then a one-digit code is fed to the sign terminal, and the number Xj is fed in the inverse code.

The output of the discrete A-, centered process is connected to the n + 1 output terminals.

8If, then on the output sign clame

i'm the impulse is not pho-immobilized, but the number Xr vyO

is given in the lr code. If Xi.0, then an imo is formed on the output sign terminal.

a pulse, and the number Xi is given in the inverse code. The operation of the device can be described by the following relations:

A-j Xj-I

Xj-gjj.

where ai a, k

a 0;

/ C T f KB

t is the selected centering interval,

/ KB-frequency quantization of the input process.

Before starting, all elements of the device are in the zero state. Opreo

the ordinate Xi is divided in a cycle composed of four cycles.

The i-th cycle of the device operation is performed

in the following way. After the end of the (-1) th device operation cycle, let the code of the number / Cai-i-a-i-i be fixed in the adder 3, and the zero code in the register 5 and the adder 7.

In step 1, the input sampling code X is added to the input terminals 9. In this case, in the superscopes 3 and 7, the codes of the numbers Kag-1-Ui-i + Xi Ka are set respectively. and xi.

In the cycle tz, a clock pulse is applied to the input terminal 10, which overwrites the code of the (-at) I13 code of adder 3 in sum 7 and in register 5. In this case, in adder 5 and in register 5,

codes of numbers X {-ag X / and (--a,).

In cycle 4, a clock pulse is fed to input terminal 11, producing discrete Xi samples of the smoothed process from adder 7, output 8, as well as rewriting the code of the number (-ag) from register 5 and adder 5. At the same time, sumattor 3 set the code number (Kai-ai).

In cycle t, a clock pulse is applied to the input terminal 12, which resets the adder 7 and the register 5.

The i-th cycle of the ipa6oTbi device is complete.

In order to increase the accuracy of the computation, it is necessary to add the size of the adders, n 7 and register 5 to increase towards the lower bits.

P ip e dme t inventions

A digital centering device containing a first-order digital aperiodic link, characterized in that, in order to simplify the device, it is equipped with a two-input digital subtraction link, one of the inputs of the subtraction link is connected to the output of the 1st-order digital aperiodic link DCA, and the second input of the subtraction link is connected to the input of the aperiodic link.