SU365842A1 - COUNTER IL '^ PULTS - Google Patents

Description

The invention relates to the field of radio electronics and can be used with 1 1 () n digital measuring tehnike.

Known counters, containing both triggering decades, and phase numbers, with an output unit, as well as non-recallable devices, containing, besides counting bits, an indication regnetter on the phase-pulse element. X. synchronous generator, blocks transferring information and output. First, the output binary-tenth potential code is reconstructed into a phase-mixed tenth code and sent to it and an output device. Secondly, the information is entered into n and the id register and is stored there until the next measurement cycle.

With a rather high speed, the nostrums per count of the counting pulses of the count of the knockout day quickly change and it is possible to read from the digital display or output to digital printing.

In recalculation of the device, it is impossible to continuously monitor and display devices with comparatively slow processes.

In the proposed pulse counter, it is possible both continuous indication in the process of counting and indication of the result but at the end of the measurement cycle with preservation of it until

the end of the next measurement cycle. This is achieved by introducing an indication control device in the counting process and an input signal timing circuit, as well as

connecting the inputs of the bits of the indication register corresponding to the trigger counting bits to the output m and occasionally, their register bits, and the input of the first bit to the output of the synchronization circuit.

Pa the drawing shows the fuicciopal scheme of the proposed pulse counter.

The counter contains countable trigger bits (decades), phase pulse discharges.

(decade1) |) 1 with combining schemes on; -hauls. indicator register 3 on the phase-pulse elements, the generator 4 snhroimts -lsov; block 5 of the census of information, which includes the keys 6 of the increment in the trigger bits,

the keys 7 are stored in the bits of the register L and the information control device 8; the circuit 9 for synchronizing the signals of the transfer of the input of the first counting bit 2, as well as the output unit 10. Posledpy consists of

node // regnstrattsn and generator 12 phase reference circuits. In the counter, the input of each of the bits 13 of register 3, corresponding to the trigger bits, is connected to the output of the current dongle; and the entrance of the first of

they are - to the synchronization circuit, connected to the output of the generator of the reference phase signals of the recording unit and to the output of the coincidence circuit 15, the inputs of which are connected to the display control device 16 in the counting process, the non-recording control device 8, and the input signals bus 17 .

The meter can operate in two modes: with indication in the counting process and with indication at the end of the counting process with preservation of the previous measurement readings until the end of the next measurement.

In the first mode, the output from the display control device -16 during the counting process sends a signal to the coincidence circuit 15, which also receives the input counting pulses and a signal corresponding to the counting of the control unit 8. In this case, the keys 6 R 7 are closed by a signal from another output of the device 8. From the output of the circuit 16, the input pulses are fed through the synchronization circuit 14 and further through the combining circuit to the input of the first bit of the indicator register 3. From the output of the first bit of the register, the counting pulses go to the second its bit. The indicator outputs of the register 3 are connected to the node 11 of the registration.

In parallel with the described counting path, counting takes place in trigger 1 and phase-impulse 2 bits. At the same time, the input counting pulses through the keys 18, controlled by the device 8, are fed to the input of the trigger bits of the counting scale. From the output of the last bit of the trigger decade, the counting pulse arrives at the transfer signal synchronization circuit 9, to which the phase constant “O from the generator 12 of the reference signals is also applied. From the outputs of the counting phase pulses, the bits of information are continuously rewritten via public keys 7 into the corresponding bits 19 of the indicative register, made in the form of memory elements. Bit 19 is connected to registration node 11. Thus, continuous indication is performed in the account process.

In the second mode of operation of the counter, the census of information into the register of phase impulses) is performed only at the end of the counting cycle. At the same time, the device 8 sends a resolution signal to the keys 6 and 7. The time of issuing the resolution is synchronized with the phase constant "O supplied to the device 8 of the generator 12. Through the keys 6, the clock pulses from the generator 4 begin to arrive at the counting inputs of all trigger decades". It is obvious that the moment of occurrence of the signals at the outputs of the decades is unambiguously related to the state of the decades at the end of the measurement time. For example, the decade is in the state "8, then the pulse at the output of the decade appears after the arrival of the second clock pulse on

her entrance. Since the beginning of the arrival of clock pulses at the input of the decade is related to the time "O" of the constant generator, the temporary position of the output signals of the decade is relative to the time "O carries information about the state of the decade in the pulse-phase form. The output signals of decades 1 through the keys 7 are fed to the recording inputs of bits 13 of register 3, the drive in accordance with its phase

output pulses with phases of output pulses of decades. After the termination of the recording process, the phase of the output pulses of the register elements is preserved, and from the last outputs, the information is sent to the input of the interconnection node 11 to uniquely characterize the state of the counter decades at the end of the measurement.

As the circuit 14 synchronization of the counting signals can be used, for example, a trigger with diode-capacitor

Bentyl .sh pa inputs installation and shaper output snghealov.

The proposed method of organizing the output can be used in any counter electrical pulses.

Due to the exclusion from the measurement cycle of the display time, the device performance is significantly increased, which allows the latter to be used for observing fast processes. On the other hand, it is possible to observe a continuous count at a low pulse rate.

Subject invention

Counter of impulses containing counting trigger and phase-pulse discharges with combining circuits on the inputs, indication register on phase-pulse elements,

sync pulse generator, information census unit, including incrementing keys in trigger bits, recording keys in registers, register census control unit, non-transfer signal synchronization circuit at the input of the first countsurge pulse discharge, and output unit, consisting of registration unit n generator phase reference signals, which is different from the fact that, in order to expand its functionality, it contains an indication control device in the counting process, while the input of each of the bits of the register corresponds to uyuschih trigger bits of the counting, connected to the output nrsdyduschego discharge and the entrance

the first of them is connected to the output of the circuit. Syncronization, connected to the output of the reference signals of the registration unit and to the output of the coincidence circuit whose inputs are connected to the display control device in the process

accounts, with the census control device, as well as with the input signals.

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