SU276211A1 - DIGITAL WIDE AND PULSE REGULATOR - Google Patents

Description

This invention relates to automatic control systems. Digital pulse-width regulators are known, which include an angle-code sensor, a binary code generation counter for n bits, AND elements for code rewriting, a second counter for generating a control signal on trigger signals, a control unit from an AND element, generator standard pulses and a read trigger connected to the output block. The proposed controller differs from the known ones in order to simplify the NMR generator through additionally installed frequency divider and two delay lines connected to the zero input of the read trigger, the output of which is connected to the counters input T1rigger of the least significant bit of the second counter via the "And" element. The potential input of this element is “And connected through the second frequency divider to the pulse generator, and the common point of the two delay lines is connected to the pulse input of all the elements“ And for code rewriting, except for this p / 2 high-order bits of the first counter through the elements “And connected to the counting the high trigger trigger input of the second counter, the output of which is associated with the single trigger trigger input. FIG. 1 shows the block diagram of the described regulator; in fig. 2 is a timing diagram of a process of converting a code proportional to the magnitude of a mismatch to a two-pole ng-impulse control signal; in fig. 3 - output characteristic of the controller. The regulator consists of an analog-to-discrete angle-code I transducer included at the input of the counter 2 of the formation of the binary code; counter 3 forming a control signal containing six triggers 4-I included through the elements OR 10-15 to the circuit 16 transferring the binary code consisting of the elements of the match AND 17-26. The control unit 27 comprises a generator of standard pulses 28 connected simultaneously with the input of a pulse divider 29, the output of which is connected to the input of an AND 30 matching circuit and a divider 5 /. The output of the divider 31 is connected in series with the two elements of the delay line 32 and 33, and the output of the delay line with a read trigger 34. The output unit 55 consists of power amplifiers .36 and 37 and the electromagnet of the rotary tin 38. The wire 39 is connected to the power supply. the trigger 9 on the first input of the trigger read 34.

From the output of the converter / to the input of the binary south of counter 2, a series of pulses arrives, the number of which is determined by the value of the disconnection of the closed system. In counter 2, a number is recorded that is proportional to the ratio of TacoBaHHio. The size of counter 2 is determined by the maximum possible mismatch, in the second case ten binary bits were selected.

When the power is turned on, the first impulse from the generator 28 passes through the divider 5 / and goes to the "Control zero settings" circuit. In this case, all the triggers of the counter 5 are set to the state "O", and the read trigger 34 is set to the state 1, O.

After the delay line 32, a pulse arrives simultaneously on the code rewriting circuit 16, overwriting the number from counter 2 to counter 3, and to delay line 33, and through it the input "Start of reading of the read trigger 34 is not received. At the same time, trigger 34 does not turn into the" O, 1, and the circuit 30 permits the passage of pulses read to the input of counter 3.

Divider 29 is required to change the proportionality factor of the controller. As the counter 3 is turned on for subtraction, G, when the pulses are fed to the input of trigger 4 in series, the value of the written number decreases. After the counter is set to "O", the next icon in all digits is set to "1.

At the same time, the pulse through wire 39 passes to the first input of trigger 34 and sets it to state 1, O. Circuit 30 closes and 1; m1 pulses to input of counter 3 do not pass. The clock repeats after receiving the next pulse from divider 31.

In the process of converting a code proportional to the magnitude of the mismatch to a two-channel, a pulmonary impulse signal, the change in the state of the outputs of the pulse amplifiers 36 and 57 depends on the state of the read trigger 34.

Depending on the number entered in the counter 3, for example 2 (Fig. 2, a), and the execution of the control algorithm when the state of the trigger 34 34 1} ia of the output element 36 is "1, and the element 37 is" O. If the state of the trigger

34 - "Oh, then at the output of element 36 -" O, and element 37 - "1. The number 2 is chosen as the zero of the control system, while the criticality Y 0.5 and the measuring magnet of the electromagnet oscillates around the average state.

When reducing the number, for example, to 2h

(Fig. 2.6) porosity decreases (0.5)

measles deviates more to the left.

By increasing the number, for example, to 25 -J- 2i

(Fig. 2, c) the duty ratio increases (y 0.5) to measles deviates more in the right direction.

FIG. 3 shows the output characteristic of the controller y (2), and the borehole control of its signal of the regulator 1 is practically zero to 1. The characteristic is proportional to the six binary bits of the binary binary code in the whole range of the output control pulses .

Subject invention

Digital pulse width controller,

contains an angle-code sensor, a binary code forly counter for n bits, the AND elements for breaking the code, a second counter for generating a control signal on the trigger, a control unit of the AND element,

a stadator and pulse generator and a read trigger connected to an output unit, characterized in that, in order to simplify the regulation of the tera, there is a pulse generator in it through the additionally installed divider

frequency and two delay lines are connected to the zero input of the read trigger, the output of which through the element “H is taken by the counting input of the younger discharge trigger of the second counter, and the potential input of this

And is connected through the second frequency divider to the pulse generator, and the common point of the two delay lines is connected to the pulse input of all the elements And for the census of the code, the cream of this, l / 2 old bits of the first counter through the elements And connected to the even trigger input old the second counter, the output of which is associated with a single read trigger input. 1. 1 J f /

0.9 0.8 0.7 0.6

0.5

o.t

0.3 0.2

0.1 0

Code

 35T2J

25

15ub ha

Fi.Z