SU1741143A2 - Device for connecting users to a computer - Google Patents

Abstract

The invention relates to computing and can be used in computer interface systems. The aim of the image is to increase the noise immunity of the device by detecting and recording one-time errors in the address combinations. This is achieved by using standard trigger group schemes, an encoder, two counters, a convolution block group, an OR element, and a clock distributor. 6 Il, 3 tab.

Description

The invention relates to computing, can be used in computer interface systems, and relates to the improvement of a device for connecting subscribers to a computer by auth.s. USSR № 1101808.

The purpose of the invention is to improve noise immunity by correcting one-time errors in the address.

FIG. 1 shows a block diagram of the device; in fig. 2 - time diagrams; in fig. 3 is an example of switching on for four subscribers; in fig. 4 - clock distributor; in fig. 5 - encoder; in fig. 6 - time diagram.

The device contains m subscriber units 1i-1mi rn convolution blocks, a group of m flip-flops 3i-3m, a distributor of 4 clock pulses, an encoder 5, two counters 6, 7, an element of OR 8, a group of address buses 9. In FIG. 3, the number 10 shows the output tires. The clock distributor (Fig. 4) contains the element OR 11, the element And 12, triggers 13,14, one-shot 15,16, the element OR 17, the Encoder (Fig. 5) contains the elements And 18, 19, the elements OR 20, 21, the element And 22.

The device works as follows.

The input address combination is recognized only by one of the subscriber units 1i-1m. In this case, at its output, a signal is generated indicating that the subscriber unit is being accessed. In order to detect one-time errors in address combinations, convolution blocks 2i-2m are connected to address bus 9 in the same way as the corresponding blocks, and carry out convolution of address combinations, forming a single signal at their outputs if the remainder of the division does not equals zero. The encoder 5 analyzes the set of signals at the outputs of blocks 1i-1m, 2i-2m and establishes the fact of the presence of an error in the address combination. Counter 6 records the number of such errors, and counter 7 records the total number of hits.

Before starting work on the Reset line, the convolution blocks 2i-2m, the Zch-3m triggers, the pulse distributor 4, and the counters 6, 7 are set to the zero state. On the address bus 9, a service combination of no access to subscribers is established (zero level in FIG. 2.1).

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When there is a call to subscribers, a change in the signal level on at least one line of the address bus 9 (high level in FIG. 2.1), the pulse distributor 4 generates pulses at each of its outputs (Fig. 2.2). The signal at the output of the block (4) is intended for zeroing the blocks 2i-2m and triggers 3i-3m (Fig. 2.2; 2.4). The signal at the first output is a clock pulse, which is cut off by recording the convolution in blocks 2i-2m, as well as recording information from the outputs of subscriber units 11-1 m in triggers 3i-3m (Fig. 2.2; 2.4). If there is an error, the encoder 5 at both outputs generates single signals, which are recorded by counters 6, 7 (Fig. 2.5; 2.6). In the absence of an error, a single signal is present only at the second output of the encoder 5 and changes the state of only counter 7 (Fig. 2.5; 2.6), thereby ensuring the registration of the next call to one of the subscribers.

The synthesis and operation of the encoder 5 will be discussed in more detail using the example of using four subscriber units 11-14 and nine-bit address bus 9 (Fig. 3). In this case, the convolution in blocks 21-24 is carried out in accordance with the x + x + 1 polynomial (division by the 111 combination). In tab. 1 shows the possible address combinations at the outputs of blocks 11-14, 2i-24, 4. In table. 2 shows the results of the convolution of address combinations, the signals at the outputs of the convolution blocks 2i-24 and the signals at the outputs of the subscriber 1t-14 blocks with no error, Table. 3 shows the possible signals at the outputs of the blocks, 2i-24 in the presence of a single error in the address combination. From tab. 2, 3 it can be seen that on the first group of inputs of the encoder 5 only four combinations are possible (0000, 1000, 0111, 1111), of which the combinations 0000, 1111 are unambiguously classified by the encoder as the absence and the presence of an error on the address bus, respectively. Combinations 1000 and 0111 on the first group of inputs of block 5 are classified as incorrect only if the second group of inputs of block 5 contains combinations of 1000 and 0100, respectively. If there is a call to subscribers, the encoder 5 should generate a single signal at the second output. A device 5 implementing these functions is shown in FIG. four.

In order that the inputs of the convolution blocks 2i – 2m in the intervals between calls to subscribers do not appear random combinations excluding the information on the counters 6, 7, a combination must be present on bus 9,

providing a zero level at the outputs of the subscriber units 1i-1m and the outputs of the blocks 2i-2m. As such, the combination 100100111 can be selected. In

5, the operation of the device this combination will alternate with the address ones, and the convolution occurs when at least one bit changes across the clock pulse at the output of block 4.

10 The device will detect all one-time errors that occur when there are no calls to subscribers, in combination 100100111, because if an error occurs at the outputs of 1i-U blocks

15 single signals 1111 will be present. At that, counter 6 detects an error. In some cases, when a one-time error occurs in the combination 100100111, the counter 7 will record the return to the subscribers, but all such calls will be recorded on the counter 6 as erroneous.

The distributor 4 operates as follows.

5 On the address bus 9, in the absence of information transfer, the combination 100100111 is installed, the inputs of block 4, on which logical 1 is fixed, are connected to the inputs of the AND 12 element, and the inputs on which the logical O is installed are connected to the inputs of the OR 10 element (Fig. 5 ). Triggers 13, 14 are set to one state, respectively, with positive and negative ratios.

5 signal (Fig. 6). Thus, any transition from 1 to O or from O to 1 on any of the lines of bus 9 will be fixed. Installing one of the triggers 13, 14 into one state means the transmission of information over bus 9 and leads to the launch of one-shot 15, 16. The pulse from the output of the one-shot 16 through the circuit OR 8 (Fig. 1) sets the triggers 13, 14 to zero. (Fig. 6),

5 Thus, the device allows both correcting and registering errors that occur on the address bus.

Claims (1)

Signaling about possible errors makes it possible to establish the timing of routine and preventive work, greatly facilitates the diagnosis of failures. Timely carrying out routine and preventive work, in turn, reduces the average time of trouble-free work and the availability of the facility. The invention of the Device for connecting subscribers to a computer according to the autor. Of the USSR USSR No. 1101808, is excellent because, in order to improve the noise immunity a one-time error detection account in the address, the device contains a clock distributor, a trigger group, an encoder, an OR element, two counters, m convolution blocks, (where m is the number of subscribers), and the information inputs of the convolution blocks and the clock distributor are connected to the corresponding bits of the group address input buses of the device, the reset input of which is connected to the reset inputs of the first and second counters and, through the first input of the OR element, to the reset inputs of the pulse distributor, m group triggers and m convolution blocks Whose outputs are connected to the first data inputs of the encoder, per0 five the left and second outputs of which are connected to the counting input of the first and second counters, respectively, whose outputs are the error outputs and the number of calls to the device; synchronization of m blocks of convolution, the information inputs of the group triggers are connected to the outputs of the corresponding subscriber blocks, the second output of the synchroimpulator It is connected to the second input of the OR element. 20 Table 1 ngt Owufaa0 $ pau / p // ve Table 2 Table3 one G zpp ± N J § -fc 4i FIG. 6