SU1732380A1 - Method of multitrack magnetic recording and device for its embodiment - Google Patents

Abstract

The invention relates to instrumentation, in particular, to recording digital information on a moving magnetic medium, and can be used in digital multi-track tape drives. The purpose of the invention is to reduce the magnetic recording error under the invention to instrument making, in particular to recording digital information on a moving magnetic medium, and can be used in digital multi-track magnetic tape drives. There is a method of multitrack recording of digital information on a magnetic tape based on TOW, whose digital information is recorded on a magnetic tape in a format that provides for simultaneous recording of the magnetic recording media across all working tracks. To this end, when recording digital information by switching over the recording signal, for each recorded code unit of the recoded information for each working track, it forms a periodically repeated recording format, according to which each working track is first recorded with a code unit, then one or several bytes of information encoded in decimal words, terminated by a code unit and containing no more than two zeros, additionally write a parity symbol t such as are for, during which the recording signal is re-encoded information is in one of two possible states. Thereafter, information recording is repeated, shifting cyclically along tracks, for example, half of the number of working tracks, transcoding information recording signals and the corresponding parity signals of the number of ticks of a certain recording signal state. 2 sec. and.2 h. item f-ly 5 ill., 1 tab. I am at the beginning, at the end and several times within the array of working information recording synchronization fields. The synchronization field at the beginning and at the end of the format contains 14 subgroups of 5 units in each subgroup and one address marker group, and inside the array the synchronization fields each contain two subgroups of 5 units, limited by two subgroups of address markers, after the array of working information consists of information groups containing 10 bytes of recoded information VI CJ con from 00

Description

The mation consists of seven working bytes and one byte of the cyclic code.

This method is intended for use in magnetic tape drives operating with a computer. In this case, the magnetic tape is preliminarily marked and defective areas are identified in which no information is recorded. All this greatly complicates the interaction with storage devices using this method in recording and reproducing streaming devices.

The known method is carried out for each working track by switching the recording signal for each code unit in accordance with the received information coding system and forming a recording format in accordance with which for each main working track the marker word signals are recorded in the stream of recorded information, and the information from all the main working tracks, replaced by the signals of the marker words, is converted into a sequential code and recorded on the backup working track, with the marker words shift one relative to the other by a multiple of the duration of the marker word.

The disadvantages of this method are related to the fact that each of the main work tracks is used as a separate, independent recording channel, which necessitates either a clear functional semantic channel separation or the formation of additional information about the channel content when recording. Moreover, during reproduction, it is necessary to jointly process the main working track with the backup one, which makes it necessary to take anti-transposal measures, and if necessary to play simultaneously from several main working tracks, there is a significant increase in equipment costs. In addition, the recording format does not provide for measures to control the quality and increase the reliability of the information when it is reproduced in connection with random dropouts of the reproduced signal.

The known method is based on switches in the recording signal for each recorded code unit of recoded information for each working track, thereby forming a predetermined periodically repeated recording format and carried out by sequentially recording for each working track of the code unit, one or several bytes of information, recoded to

deciadisable words ending in a code unit and containing no more than two zeros of the sequence. Moreover, the recoded bytes of the control code for the information bytes written along the remaining working tracks are written along one of the working tracks, two parity character codes of the number of code units written onto odd and even places of the recoded information, and an additional code unit, then one or two lines of magnetic recording write parity characters of the number of code units for each line of the magnetic field the sources of the encoded information, while at the places of unused bits, write code zeros.

The main disadvantage of this method is that there is no protection against information distortions associated with group fallouts of the reproduced signal, in which the overall synchronization is still preserved. In addition, a disadvantage of the method is that for the detection and

5 corrections of single random errors within the recording format are used an additional 5-6 recording cycles (lines), which increases the consumption of magnetic tape by about 30% relative to the amount of tape used to record the recorded information.

Devices are known that perform multi-track recording of digital information on a magnetic tape and that contain

5 sub-trip valve, shift registers, write driver, recording amplifiers and magnetic head block. In this case, the devices carry out multi-track information recording by converting parallel multi-digit digital information into a track code sequence.

The disadvantage of the devices is the lack of protection against errors associated with the release of the signal during playback and the inability to perform word-consuming (frame) synchronization that is resistant to scoring.

A device is known that contains information, additional and reference channels, a synchro-frequency conversion unit, write and read address counters, a marker word formation unit and provides multi-track writing.

5 and the implementation of frame synchronization during reproduction by entering into the code of the recorded information the codes of the marker signals.

However, this device also lacks measures to protect information from accidental fallouts, in addition, it is characterized by increased complexity of building information and additional channels, the presence of individual memory blocks in them, and the lack of possibility of compensating for interdischarge effects, which does not allow increasing recording density.

A device comprising a modulator, a driver, delay elements, a binary counter, AND, OR elements, a trigger, and a synchronization unit is known, while increasing the reliability of information with increasing longitudinal recording density by introducing a phase correction of the recording signal.

However, the device does not provide frame synchronization and protection against accidental failures.

A device for recording binary information is known, which contains shift registers, a register distributor, marker write-off registers, multi-channel switches, counters, modulators, recording amplifiers.

The drawbacks of the device are the increased complexity and lack of measures to improve the reliability due to random drops in the playback signal and intersymbol influence with increasing recording density.

A device is known that contains information and additional channels, which include AND, OR, NOT-AND elements and modulators, as well as a frequency divider, marker generator, overhead information generator, pulse distributor and NOT element, and providing an increase in information capacity. signal recording and synchronization during playback.

However, this device does not provide compensation for the intersymbol influence in the playback signal and protection against accidental fallout in it,

The closest in technical terms to the present invention is a device for multi-track digital magnetic recording, containing a source block of information and control signals, connected in series with information and synchronization inputs to a code converter, to the outputs of which information and address inputs of buffer orthogonal memory device (BOSE block), control and synchronization inputs also connected to the corresponding outputs of the source block info signals mation and control, the read address counter, its outputs,

connected in parallel to the inputs of the readings of the BOZU unit and code converter, and the counting input connected to the output of the synchronizing unit of the source information and control signals, and connected to the outputs of the BOZU unit in series with the number of working tracks and the unit of magnetic heads.

A disadvantage of this device is that the device does not have protection against distortions of information associated with group fallouts of the reproduced signal, which still retains overall synchronization. In addition, signals are generated in the code converter of this device, adding up to 30% additional redundancy to the recording signal, which reduces the efficiency of using a magnetic tape.

The aim of the invention is to reduce the magnetic recording error in the event of defects in the magnetic recording medium.

To this end, when recording digital information by switching in the recording signal, for each recorded code unit of the recoded information for each working track, with the formation of a periodically repeated recording format, according to which each working track is first recorded with a code unit, then of bytes of information recoded to decimal bits, terminated by a code unit and containing no more than two zeros, additionally write the parity code symbol h weak cycles during which the transcoding information recording signal is in one of two possible states, after which the information recording is repeated, shifting cyclically along the tracks, for example, half the number of working tracks, the transcoded information recording signals and the corresponding parity signals of the number of individual cycles recording signal status, s

A device for multi-track digital magnetic recording containing information and control signals buses connected to the corresponding inputs of an encoder, a buffer orthogonal storage unit and a read address counter, and the encoder outputs connected to a recording signal input, information inputs and write address addresses of a buffer orthogonal storage block devices whose read addresses are connected to the bits of the addresses of the addresses of reading, according to the number of working tracks, sequentially connect Foreign shapers and recording signal amplifiers and a block of magnetic heads connected to the outputs of amplifiers are additionally equipped with a track switch made, for example, on 2I-OR elements connected by their information inputs to the outputs of a buffer orthogonal storage unit, and to the outputs of the recording signal drivers, and the control input to the buses of information signals and control signals. At the same time, in the switchboard, each information input is connected to the first input of the first element AND corresponding to it by the track number of element 2И-OR and to the first input of the second element AND at element 2И-OR, which is halfway apart from the track number element 2I-OR, corresponding to the number of information entry, the second inputs of the first elements AND of all elements 2I-OR are combined together, connected with the combined second inputs of the second elements AND of all elements 2I-OR through the element NOT whose input th is the control input of switch paths.

In addition, an encoder containing a delay element, a serially connected counter and a first trigger, first and second static registers, and a persistent storage unit (ROM) address inputs connected to the outputs of the first register, whose inputs and input of the delay element connected to the polling input of the block ROMs are encoder inputs, the first outputs are connected to the inputs of the second register, the outputs of which are the first (informational) outputs, additionally equipped with second and third triggers and element I. In this case the input of the counter in parallel with the installation input of the third trigger is connected to the output of the delay element via a second trigger, the output of which is in conjunction with the outputs of the counter bits and the output of the signal of the status of trigger are the second (addressable) outputs of the encoder, the first input of the And element is connected to the output signal of the state of the second trigger and the third input directly, and the second input through the third trigger with the corresponding outputs of the Permanent Storage Unit. An additional bit of the second static register is connected to the output of the And element.

The buffer orthogonal storage device consists of four sub-blocks of the orthogonal memory, address and

information inputs and outputs of which, in accordance with their purpose, are connected in parallel and form input write address buses, input write data buses and input read address buses, and output buses of the information read by it, which are the corresponding inputs and outputs of the buffer orthogonal storage unit . The parallel-connected inputs of the write and read signals of all four sub-blocks of the orthogonal memory are also the corresponding inputs of the buffer orthogonal kneading unit.

5 The proposed technical solutions make it possible to reduce magnetic recording errors in case of defects in the magnetic recording carrier due to double recording (duplication) with cyclic shift along working tracks. In case of distortions of information on one or even several tracks detected during the even-parity check of the number of clock signals of a recording of a certain level, the information will be restored by reproducing a duplicate recording of the same information on another track.

FIG. 1 shows a diagram of the formation of a signal structure on a tape; in fig. 2 0 functional diagram of the device for recording; in fig. 3 - functional scheme of the encoder; in fig. 4 is a functional diagram of a buffer orthogonal storage device; in fig. 4 - functional design of the track switch ma.

As an example of a device that implements the proposed method, is considered a device made in accordance with the functional diagram,

0 shown in FIG. 2 and the functional block diagrams of the blocks shown in FIG. 3 and 4, and ensuring the formation of the signal structure on the tape in accordance with the structure shown in FIG. 1. Record

5 digital information is carried out on 13 working tracks with a record for each track in the received for the considered example recording format of two bytes of recoded information. When re

The 0 (duplicate) recording is cyclically shifted the information on the tracks by six positions, i.e. the information initially recorded on tracks 1-13 is re-recorded respectively on

5 7-13; one; 2-6 tracks.

The recording device comprises buses 1 of information signals and control signals, connected to the corresponding inputs of encoder 2, block 3 of a buffer orthogonal storage device, a counter of 4 read addresses and a control input of a switch 5 tracks. The counter 4 of the reading addresses is connected to the inputs of the reading address of block 3 of the buffer orthogonal storage device, whose address and information inputs are connected to the corresponding outputs of encoder 2. The information outputs of the block 3 of buffer orthogonal memory are connected through the switch 5 tracks connected to them correspondingly connected in series shaper b and recording signal amplifiers 7, the outputs of which, in turn, are connected to a block of 8 magnetic heads,

Encoder 2 (Fig. 3) contains the first static register. 9, the inputs of which are the information inputs of encoder 2, and the outputs are connected to the address inputs of ROM unit 10, whose recording signal input combined with the input of delay element 11 is the clock input of encoder 2. Second counter counting trigger 14 connected in series with delay element 11 , counter 12 and the first counting trigger 13, the third trigger 15, the element 16 and the second static register 17. In this case, according to the degree of precedence of the bits, the outputs of the counter 12, the second trigger 14 and the first trigger 13, are the first outputs of the encoder 2, dissolved group outputs a write address in BOZUZ. The third trigger 15 is connected by counting input to the first output of block 10 ROM, set in parallel with counter 12, to the output of the second trigger 14, and output to the second input of the AND 16 element, the first input of which is connected to the output of the second trigger state signal 14, and the third input is with the second output of the permanent storage unit 10. The output element And 16 and the group of the third outputs of the block 10 ROM is connected to the input of the second static register 17, the outputs of which form a group of information outputs of the encoder 2.

The blockage of the buffer orthogonal storage device in the considered example consists of four subblocks of the orthogonal memory 18-21, in each of which 13 words can be written and stored (according to the number of working tracks). At the same time, the first 18 and third 20 subblocks of the orthogonal memory are equal to the length of the recoded byte (ten bits), and the second 19 and fourth 20 subblocks of the orthogonal memory are doubled to store the parity code and the additional code bit. units. Address and information

the inputs and outputs of the orthogonal memory subunits 18-21, in accordance with their purpose, are connected in parallel and form input address write buses, input write information buses 5, read address input buses and read information output buses, which are the corresponding inputs and outputs of block 3 buffer orthogonal storage

0 devices. The inputs of the write and read signals of the block 3 of the buffer storage device are connected with the inputs of the write and read signals of the sub blocks 18-21 of the orthogonal memory, respectively, assigned to the assignment.

Switch 5 tracks in this example is made on the elements 2I-OR 22 according to the number of working tracks and the element NE-23 (functional diagram

0 of the switch is shown in FIG. four). The first inputs of the first element AND of all elements 2И-OR 22 are connected to the information inputs of the switch 5 tracks in order of their numbers. The first inputs of the second elements AND of all elements AND of all elements 2I-OR 22 are also connected to the information inputs of the switch 5 tracks, but shifted by six tracks, as mentioned earlier, the second inputs of the first elements AND all elements 2I-OR 22 are connected together and connected to the input element NOT 2-3, which is the control input of the switch 5 tracks, and the second inputs of the second elements AND of all elements 2I-IL AND 22

5 are also combined together, but connected to the output of the element NOT. The outputs of the elements 2I-OR 22 are outputs of the switch 5 tracks.

The remaining blocks of the device are made in full accordance with the similar in purpose blocks in the known device.

The device works as follows.

5 The operation cycle begins with the installation of the device in the initial state. Then, the information and control signal buses enter the encoder 2 as input-information in the form of a sequence of bytes, each of which is accompanied by a synchronization signal that is delayed in relation to the time of arrival of the byte during the transients. Each received byte of information in the encoder 2 is written to the first static register 9, from the output of which it is already recorded as block address in block 10 of the ROM. The synchronization signal accesses the contents of block 10 of the ROM and outputs the code, which is represented by the parity signal of the states of the recording signal (the first output) and the nine-bit group of transcoded byte signals. One of the possible encoding options is given in the table. In the ROM encoding table, all data is represented in an octal code and corresponds to a format in which the three least significant bits are the recoded byte (variable part), and the fourth bit (in binary representation) contains the code unit, The lower bit and the code of the parity of the number of clock ticks of the recording of one level. The recording signal codes are selected from a family of binary codes containing no more than two zeros of the order, and the tenth digit is a constant code unit. Codes that contain only one zero and codes that contain two zeroes in the absence of at least one zero are excluded from the number of selected codes.

In the case when the signal at the first output of block 10 of the ROM corresponds to a code unit, the third trigger 15 switches to the summation function by 2 parity signals of the write signal for each pair of recoded bytes. The reset of the third trigger 15 to the zero state after processing each pair of bytes is performed according to the signal from the output of the second trigger 14.

The state signal from the output of the third flip-flop 15 is fed to one of the inputs (second input) of the And 16 element. In the case when the second flip-flop 13 is in the zero state (the odd byte of the input information is converted), the And 16 element will be locked and the polling signal, incoming from the second output of block 10 ROM will not be skipped to the input of the additional bit of the second static register 17. At the same time, the recoded byte of information will be written to this register.

When processing an even byte from the second flip-flop 13 (switching the flip-flop 13 occurs according to the synchronization signal received from the output of delay element 11, the delay time should ensure the completion of all byte processing in encoder 2) the input potential of the element 16 will flow to the resolving potential. In this case, the signal from the second output of block 10 of the ROM will be interrogated the state of the third trigger 15 and its value transferred to the additional bit of the second static register 17.

Next, the recoded byte of information is supplied to the record in block 3 of the buffer orthogonal storage

device consisting of four subunits 18-21 orthogonal memory. The first 18 and third 20 blocks in this version of the recording device contain 13

write lines (according to the number of working tracks of the record) by 10 bits (the recoded byte length), and the second 19 and fourth 21 blocks - 19 and 21-13 write lines by 12 bits (the recoded byte of the information bit, the bit of the parity code the recording signal and the additional bit of the code unit). The write addresses for each of the sub-blocks of the orthogonal memory 18–21 are distributed as follows (code

5 octal): the first subunit 18 of the orthogonal memory - 00-14; the second subunit 19 of the orthogonal memory — 20-34; the third subunit of 20 orthogonal memory - 40-54; fourth subunit 21 of orthogonal memory 0 60-74.

Information is read from block 3 of the buffer orthogonal memory device by columns (with the same name of all rows of the record)

5 subunits of orthogonal memory 18-21. The read addresses for each subunit 18-21 of the orthogonal memory are distributed as follows (octal code): the first subunit 18 of the orthogonal memory 0 00-11; the second subunit 19 of the orthogonal memory — 12-25; the third subunit of 20 orthogonal memory - 40-51; the fourth subunit of 21 orthogonal memory — 52–65.

Address reading information from block 3

5 buffer orthogonal storage device is formed by a set of signals, in order of precedence of bits, from the outputs of the counter 4 reading addresses, the counting cycle of which is equal to half the number of lines

0 magnetic recording of the full recording format (in this case, the full recording format contains 44 lines of magnetic recording) and from the inverse output of the first trigger 13. As a result, during the formation of the full recording format, the reading address counter 4 will perform two full counting cycles and a double block polling will occur 3 buffer orthogonal storage device at the same addresses.

0 From the output of block 3 of the orthogonal buffer storage device, the signals are fed to the inputs of the switch 5 tracks, in which, after passing the main part of the recording format, under the action

5, a control signal is switched, providing for the cyclic movement of the recording signals along the recording tracks. In this example, the movement is carried out on six tracks. The control signal switch 5

Tracks is a signal that arrives on the bus 1 of information signals and control signals and changes its value after each half-format.

Pass through the switch 5 tracks, information signals for each of the tracks get to the input of the imaging unit 6 and the recording signal amplifier 7 connected in series with it. A write signal generator B converts a binary digital code signal into a BWN type signal, in which level switching occurs on each code unit of the recorded information, conversion can be performed by any device designed to generate this type of signals. In the simplest case, this may be a counting trigger. The recording signal amplifier 7 provides the required signal level to the magnetic heads.

The technical and economic effect from the use of the proposed technical solution is primarily associated with an increase in the reliability of information during its reproduction. The proposed method and the device implementing this method make it possible to increase the reliability of information in the case of single, random precipitations as well as in flashes of errors associated with defects in the magnetic carrier. In addition, it was possible to use only one bit of the parity code of the write signal state, instead of two bits of the parity code in the known device, and also the equipment costs are reduced.

Claims (4)

1. Multi-track digital magnetic recording method based on switching in the recording signal for each recorded code unit of the recoded information for each working track, with the formation of a periodically repeating recording format, which means that the code unit is recorded for each working track , then one or several bytes of information recoded into decimal words, ending with a code unit and containing no more than two zeros, also characterized in that, in order to remove Magnetic recording errors for defects in magnetic recording media additionally record the parity symbol for the number of cycles during which the transcoded information recording signal is in one of two possible states, after which the information is repeated by shifting cyclically along the tracks by half the number of working tracks. the transcoding information recording signals and the corresponding parity signals of the number of ticks of a certain recording signal state. 2. Device for multi-track digital magnetic recording, containing a bus of information signals and control signals, connected to the corresponding inputs of the encoder, a buffer block 0 orthogonal storage device and a read address counter, the encoder outputs are connected to the write signal input, information inputs and write address of the buffer orthogonal block 5 memory devices, the read address inputs of which are connected to the outputs of the read address counter bits, and also contains a block of magnetic heads connected via recording signal amplifiers to the outputs of the recording signal conditioners, characterized in that, in order to reduce the magnetic recording error in case of carrier defects magnetic recording, the switchboard is entered into it, 5 containing elements 2I-2I-OR and an element NOT connected by inputs to the outputs of the buffer orthogonal storage unit, outputs to the inputs of the recording signal drivers and the controlling input to the information signal and control signals buses, each input connected to the tracks switch one input of the first element 2I corresponding to the track number 5 of element 2I-2I-OR and with one input of the second element 2I of element 2I-2I-OR, whose number differs in the order of track numbers by half the number of recording tracks from element number 2И-2И0 OR, corresponding to the number of input, the other inputs are first elements 2I of all elements 2I-2I-OR are connected to the combined other inputs of the second elements 2I of all elements 2I-2I-OR through 5 is a NOT element whose input is the control input of the track switch. 3. The device according to claim 2, characterized in that the encoder comprising a delay element connected in series 0 counter and the first trigger, the first and second static registers and a block of permanent storage device, the address inputs connected to the outputs of the first static register, the inputs of which are and 5, the input of the delay element connected to the polling input of the persistent storage unit is the corresponding inputs of the encoder, and the first inputs are connected to the inputs of the second static register, the outputs of which are the first information outputs, also contains the second and third triggers and the And element, with Thereby, the input of the counter and the input of the installation of the third trigger are connected to the output of the delay element via the second trigger, the output of which, together with the outputs of the counter bits and the output of the first trigger, are the second coder's output outputs, the first input of the And element is connected to the output of the second trigger, the third input is directly, and the second input is connected to the corresponding outputs of the And block of the constant storage device through the third trigger of the second static input. register. 0 five 4. The device according to claim 2, that is to say that the buffer storage unit contains four sub-blocks of an orthogonal memory, the address and information inputs and outputs of which are connected in parallel and are input address buses records, input information buses, input read address buses, and information output buses, which are the corresponding inputs and outputs of the buffer orthogonal storage unit, and the parallel-connected inputs of the write and read signals of all four subblocks of orthogonal pa ti are corresponding inputs of the buffer memory orthogonal. Code units recording beat Record byte recoded tsnsrmats and and - TctK.fr) recording the Parity Code of the signal states FIG. four about l "about about GT 7G m (ABOUT 0 eleven #ten 13 i7 Phases. 3 FIG. 4 Phage. five