SU1691832A1 - Digital sampler - Google Patents

Description

one

(89) DO 250648 (48) 10.21.87 (21) 7774203/24 (22) 06/03/86 (31) WP, H04B / 278697

(32) 07/17/85

(33) DD (46) 15.11.91. Bul №42

(71) German Post Office, Broadcasting and Television Engineering (DD) Headquarters

(72) Hyogh Wolfgang (DD) (53) 681.325.66 (088.8)

(56) USSR Author's Certificate No. 1160393, cl. G 06 F 7/04, 1983.

USSR author's certificate number 1003069. class. G 06 F 7/00, 1981.

(54) DIGITAL DISCRIMINATOR (57) The invention relates to computing. Its use in information processing or transmission systems allows for a wider range of applications due to gradient discrimination. The digital discriminator contains buffer registers 1, 2, comparators 5, 6, switching control block 7 and switching block 8. By introducing buffer registers 3, 4 into which the previous values of the first and second input signals are written, the latter are switched when their values and directions of change coincide, which eliminates clicks and the like. distortion. 1 il.

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The invention relates to computing and can be used in systems for processing or transmitting information, in particular, audio signals (mixing, switching delay times, etc.).

The purpose of the invention is to expand the scope by discriminating by gradient.

The drawing shows a functional diagram of a digital discriminator.

The digital discriminator contains the first to fourth buffer registers 1-4, the first 5 and second 6 comparators, the switching control unit 7 and the switching unit 8. In the drawing, the first 9 and second 10 inputs of the discriminator are indicated.

The first 1 and second 2 buffer registers are used to record the current values of the first and second input signals, respectively, and the third 3 and fourth 4 buffer registers to record the previous values of the same signals.

The first comparator 5 compares the absolute values; at its output, a signal is generated with (sufficient) equality of the current discrete values of the signals. The EjTopou comparator 6 serves to compare the gradients of the input signals, at its output a signal is formed when the direction of change of both signals coincides, i.e. when both signals simultaneously increase or decrease.

The switching control unit 7 forms a signal in accordance with the required switching conditions of the input signals. For example, in the simplest case, when switching is necessary when the absolute values and gradients (directions) of input signals change, the block 7 can be implemented as element I.

The digital discriminator works as follows.

The current values of the input signals are written to the buffer registers 1 and 2, and the previous values of the same signals are written to the buffer registers 3 and 4. Current values are compared in comparator 5, gradients

(signs of differences of the current and previous values) - in the comparator 6. With the coincidence of the current values and the same gradients, block 7 generates a signal by which

block 8 connects to its outputs other inputs.

If necessary, the circuit can be supplemented, for example, by a comparator of zero values, then the switching is performed when both signals pass through zero.

As a result of the fact that the switching of signals occurs when the directions of their change coincide and

at least the current values are close, for cases of sound signals, click type distortions, etc. are excluded.

Claims (1)

DETAILED DESCRIPTION A digital discriminator comprising The first and second buffer registers, the first and second comparators, the output of the first buffer register are connected to the first input of the first comparator, the output of which is connected to the first input of the switching control unit, the output of which is connected to the control input of the switching unit, the output of which is the discriminator output, different the fact that, in order to expand the scope by discriminating by gradient, the third and fourth buffer registers are entered into it, the inputs of which are combined with the inputs of the first and second buffer registers are the first and second inputs of the discriminator, the first information input of the switching unit and the first input of the second comparator are connected to the output of the first buffer register, the output of the third buffer register is connected to the second input of the second comparator, the output of the second buffer register is connected to the third input of the second and second inputs of the first comparator and the second information input block switching, the output of the fourth buffer register is connected to the fourth input of the second comparator, the output of which is connected to the second input of the switching control unit. 0