SU1686599A1 - Method for forming three-phase symmetric voltage - Google Patents

Abstract

The invention relates to electrical engineering and can be used to create exemplary three-phase voltage sources necessary for the calibration of electrical energy quality indicator meters. The purpose of the invention is to improve the accuracy and expansion of the frequency range. To do this, in the generator 1 form a sequence of pulses with a frequency f 3nf0, where fo is the required frequency of the output voltage

Description

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neither The upstream counters 11–13 and counters 2–4 form three in-phase sequences of the digital codes of the sinusoids arguments. For each sine wave argument code, analogue voltages are amplified by 5-7 to 7 and digital to analogue converters 8-10, which are amplified by power amplifiers 14-16. The initial phases and amplitudes of the voltages are measured.

The invention relates to the field of electrical engineering and can be used to create exemplary sources of three-phase voltage necessary for testing electricity quality indicators.

The aim of the invention is to improve the accuracy and expansion of the frequency range.

The drawing is a schematic diagram of a device that implements a method for forming a three-phase symmetric voltage system.

The device contains a high-frequency pulse generator 1, counters 2-4, fixed storage devices (ROM) 5-7, digital-to-analog converters (D / A) 8-10, upstream meters 11-13, amplifiers 14-16 power, converters 17-19 code -current selective voltmeter 20.

The device works as follows.

Pulses with a frequency f 3nf0, where f0 is the required frequency of the output voltage, are output from the output of high-frequency pulse generator 1 to the counting inputs of the preincluded counters 11–13. Transfer pulses after overflow of counters 11-13 are used as counters for respectively counters 2-4. During operation in this mode, counters 2–4 form three in-phase sequences of digital codes of sinusoid arguments with Zn values. These codes are sent to the address buses of the ROM 5-7. From the ROM 5-7, the digital codes of the instantaneous values of the three sine waves are extracted. The digital codes of the instantaneous values of the three sinusoids are fed to the control inputs, respectively, of three D / A converters 8-10. DACs convert instantaneous value codes to corresponding analog voltages that are amplified by 14-16 power amplifiers.

In the presence of phase nonidentity of the channels at the first harmonic of the voltage at the outputs of power amplifiers

the outputs of the amplifiers 14-16 and equalize them by changing the initial phase in the upstream meters 11-13 and the gains of the converters 8-10. The final formation of a three-phase symmetric voltage system is carried out by presetting the counters 2–4, respectively, at 0, n, and 2n values, which corresponds to a change in the phase of the voltage at amplifier 14 by 120 °, and at amplifier 15 by 240 °. 1 il.

have between themselves a phase shift at the first harmonic. For example, the voltage of phase A at the first harmonic lags behind the voltage of phase B. A phase meter connected to the output of power amplifiers 16 and 14 shows that the voltage of phase A at the first harmonic lags behind the voltage of phase B. That is, it is necessary to reduce this phase shift. This can be achieved by writing to the pre-enabled counter 12 1 at the lower order. At the same time, the transfer pulses from the pre-activated counter 12 are t-in earlier and the phase shift decreases. Thus, the phase shift between phase A and B voltages is reduced. A further phase shift between these voltages is achieved by increasing the preset number code in the upstream counter 12 in the upstream voltage channel counter, which is lagging behind.

We assume that the voltage is in-phase, if the identity in the phase D p corresponds to the following ratio in the following relation: -jq,

2 3 n

where N is the number of bits in the upstream counter; Sn is the number of states of each of the counters 2-4. Having in-phase the voltages A and B, we use the same operations to achieve the in-phase three voltages A, B, and C.

Next, we achieve the equality of the three voltages A, B, and C in the first harmonic as follows. In the drawing, D / A converters 8–10 contain the 17–19 code converters — current and operational amplifiers 21. Initially, the rheostat engines 22 are in the middle position. Suppose that the voltage of phase A is greater than the voltage of phase B. Selective voltmeter 20 measures the voltage of the first harmonic (on) at the outputs of the power amplifiers 13 and 14. The voltage at the output of the DAC 8 is reduced, reducing the resistance of the rheostat 22. Thus, the voltage of the first harmonic at the output of the power amplifier 16 will also decrease. Move the engine will

obtaining the equality of two output voltages on the first harmonic. This is evidenced by the zero reading of the selective voltmeter 20.

The final formation of a three-phase symmetric voltage system is carried out by presetting the counters 2-4, respectively, O.p, 2p, where n, for example, is 60. The teleurers from three ROMs extract the codes of the instantaneous values of the sinusoids, but with a shift, Simulated by presetting counters 2-4 (0, p, 2p).

The entire period of the sinusoid corresponds to the Sn states of the counter. Each instantaneous value of the sinusoid is repeated in terms of the counter states or 360 °, n 120 °. Counters 2-4 will keep a score, controlling the extraction from three 5-7 ROMs of codes of instantaneous values of sinusoids, shifted in phase by 120 °. The shift of the output voltages of the first-harmonic amplifiers 13-15 in this mode is 0, 120, and 240. Moreover, the change in the preset of the upstream counters 11, 12, and 16 compensates for the nonidentity of the phase characteristics, and the change in the transfer ratios of the UAP signal transmission paths.

Claims (1)

Invention Formula The method of forming a three-phase symmetric system of voltages by leveling the amplitudes and forming phase shift between sinusoidal voltages, characterized in that, in order to increase accuracy and expand the frequency range, a sequence of pulses is formed with a frequency f 3nf0, where f0 is the required frequency of the output voltage, three sequences of digital argument codes of sinusoids are formed from this sequence of pulses For each digital code of the argument, which have Sn values, form the corresponding digital code of instantaneous values of sinusoids; convert digital codes of instantaneous values of sinusoids to the corresponding values. tvuyuschie sinusoidal voltages, amplify them, compare them in phase and, if there is a phase difference, change the initial phases of the sequences of the digital codes of the sinusoids arguments before the phase alignment voltage, compare the resulting sinusoidal voltage amplitude and if the amplitudes of these voltages have different values, change the gain before leveling the amplitudes. after which the phases are shifted between sinusoidal voltages by shifting the initial phases of one sequence of digital codes of arguments by n values, and the second sequence by 2p values in relation to the initial phases of the sequence of digital codes of the arguments of the sinusoids.