SU1684929A1 - Device for phase automatic frequency control - Google Patents

Description

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(21) 4629545/09

(22) 02.01,89

(46) 10/15/91 Bulle # 38

(71) Leningrad Institute of Aviation Instrumentation

(72) E.A. Kondratyev (53) 621.396.662 (088.8)

(56) Shahgild and V.V. and others. Phase-locked loop systems. M: Holy Horn, 1972, fig. 9.6a.

(54) DEVICE OF PHASE AUTO CONSTRUCTION OF FREQUENCY

(57) The invention relates to radio engineering and can be used to track the carrier frequency of a signal. The aim of the invention is to reduce the dependence of the acquisition time on the frequency detuning value. The device contains first and second phase detectors 1 and 2, low-pass filter 3 with adjustable gain, tunable oscillator 4, phase shifter 5, integrator b, amplifier 7 with adjustable coefficient gain, the adder 8 and the square 9. The goal is achieved due to the presence of blocks 6, 7, 8 and 9 included in the control circuit of the gain of the filter 3. The presence of the quad 9 and amplifier 7 allows you to set ck The frequency of entering into synchronization in accordance with the magnitude of the frequency error in the device As a result, the tuning time does not depend much on the initial detuning in frequency 1 or less

The invention relates to radio engineering and can be used in synchronization systems and tracking of the carrier frequency.

The purpose of the invention is to reduce the dependence of the time to synchronization on the magnitude of the frequency detuning.

The drawing shows a structural electrical circuit of a phase locked loop device.

The device contains the first and second phase detectors 1 and 2, a low-pass filter 3 with an adjustable amplification factor, a tunable oscillator 4, a phase shifter 5, an integrator 6, an amplifier 7 with an adjustable gain factor, an adder 8 and a quadrant 9

The device works as follows.

In synchronous mode, the output of the integrator 6 is set to:

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This corresponds to the minimum gain of the filter 3 and, consequently, the minimum passband of the filter 3. At the output of the adder 8 there is a zero voltage. In this case, the main phase locked loop, containing the first phase detector 1, filter 3, and tunable oscillator 4, operates in the input frequency tracking mode.

The output signal of the second phase detector performs the function of a synchronous operation indicator and has a constant level.

If the device has a frequency offset, the signal level at the outputs of the second phase detector and amplifier 7 decreases. A voltage appears at the output of the adder 8, which leads to an increase in the voltage at the output of the integrator 6. This. in turn leads to growth

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the gain of the filter 3, which automatically expands the filter bandwidth, thereby facilitating the input into synchronism of the main ring.

In addition, the voltage from the output of the integrator affects the gain of amplifier 7 through quad 9, in particular the increase in gain is proportional to the square of the voltage of integrator 6.

As a result of this work, the bandwidth of the main ring, which determines the time of entry into synchronism, depends on the amount of detuning in frequency; the greater the frequency detuning, the greater the voltage at the integrator output and the shorter the time taken to synchronize the phase locked loop device.

Claims (1)

Phase locked loop device comprising a first phase detector connected in series, the first the input of which is the input of the device, a low-pass filter with adjustable gain, a tunable oscillator, the output of which is connected to the second. the first phase detector, the phasing detector and the second phase detector, as well as a low-pass filter, characterized in that, in order to reduce the dependence of the time in synchronization: 5m from the frequency detuning, a sequentially connected amplifier with an adjustable gain and an adder, the second input of which is an input for supplying a reference voltage, as well as a quad, the low-pass filter being designed as an integrator and connected between the output of the adder and the control input filter lowpass koeffitsiengom with adjustable gain, and a squarer connected between the output of the integrator and the control input of the amplifier with adjustable amplification factor.