SU1674029A1 - Device for calibrating electric signal amplitude levels of multilevel digital generators - Google Patents

Abstract

The invention relates to electrical measurements, in particular to a teslameter calibration installation, and can be used to calibrate and adjust the amplitude levels of electrical signals of multi-level digital generators. The purpose of the invention is to improve the accuracy of calibration and adjustment of the amplitude levels of electrical signals of multilevel generators - achieved by using a controlled key 3, a phase selector 7, elements 2 AND - NOT 8, 9, element 3 AND - NOT 10, elements EXCLUSIVE OR 11, 12, capacitor 13, switches 14, 15, resistors 16, 17. The device also includes a master oscillator 1, a frequency control unit 2, a counter 4, a ROM 5, a digital-to-analog converter 6, a step attenuator 18, a DC voltmeter 19. 1 il.

Description

The invention relates to electrical measurements, in particular to a teslameter calibration installation, and can be used to calibrate and adjust the amplitude levels of electrical signals of multi-level digital generators.

The purpose of the invention is to improve the accuracy of calibration and adjustment of the amplitude levels of electrical signals of multi-level digital generators.

The drawing shows a block diagram of the device.

The device contains a master generator 1, a frequency control block 2, a control key 3, a counter 4, a memory block 5. a digital-to-analog converter 6, a logic block 7 for phase selection 7, the first and second two-input logic elements AND 8. 9, a three-input logic element AND

10, first and second logic elements EXCLUSIVE OR 11, 12, capacitor 13, first and second switches 14. 15, first and second resistors 16, 17, step attenuator 18, DC voltmeter 19, and master oscillator 1. control unit 2 frequency, control key 3, counter 4 storage unit 5. digital-to-analog converter 6, step attenuator 18 and direct current voltmeter 19 are connected in series, logical block 7 for phase selection by two inputs connected to counter 4. the first of the inputs is connected to 1 + 1 output second counter - to the I output, and the output of the logic unit 7 of the phase selection is connected to the input of the key 3, while in the circuit of the logic unit 7 of the phase selection the first element And 8 is connected by one input to the first input of the logical O

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skysky block 7 phase selection, and the other with the first contact of the switch 14 and the second input of the second element And 9, the first input of which is connected to the output of the element And 8; the output of the second element AND 9 is connected to the second input of the element AND 10, the first input of which is connected to the second input of the logic unit 7 for phase selection, and the third input of the element AND 10 to the first contact of the switch 15 and to the first inputs of the two elements EXCLUSIVE OR 11. 12, wherein the output of the first element is connected to the second input of the second element and the capacitor 13, the output of which is connected to the Reset input of the counter, where the second outputs of the switches 14, 15, the first element of the EXCLUSIVE OR 11 and the capacitor 13 are connected to a common bus.

The operation of the proposed device should be considered in two modes - in the mode of generating sinusoidal oscillations (operating mode) and in the calibration mode.

In the operating mode, the switches 14, 15 are closed, the key 3 is open. The master oscillator 1 generates high frequency pulses, which are fed to the frequency control unit 2. From the frequency control unit 2, the pulses are transmitted through the public key 3 to the counter 4, in which the pulse sequence is converted into a linearly increasing parallel code. This code arrives at the address inputs of the storage unit 5 and calls at its outputs another parallel code, varying in time according to a sinusoidal law, which is converted into a digital-to-analog converter 6 into an analog sinusoidal voltage. The signal is then fed to a step attenuator 18 for setting various output levels of electrical signals, which are monitored, calibrated, and adjusted using a DC voltmeter 19.

In the calibration mode of the amplitude levels of the positive-polarity electrical signals, the switch | 4 is in the closed state, the switch 15 is in the open state, thereby turning on the phase selection device. At the time of the opening of the switch 15 to the third input element And 10 receives a signal of a logical unit, allowing the passage of signals through two other inputs. At the same time, this signal is fed to the first inputs of logical elements EXCLUSIVE OR 11,12. At the second input of element 11, there is a logical zero, therefore, at the output of this element, there is a gap with some back ground due to

capacitor 13 logical unit. This signal will arrive at the second input of element 12 later than the signal of the logical unit arrived at the first input. In the interval

the delay time of the signal at the inputs of element 12 will be opposite polarity signals; consequently, at the output, a pulse signal whose duration is equal to the time of this delay is output. Received by him

The pulse from the output of element 12 is fed to the input R of counter 4 and resets the counter to its original state.

After that, the sinusoid starts to form from zero to 90 °. R that moment.

counter 4 will make a count of the number of pulses corresponding to a phase of 90 ° at a certain output of this counter (l 17.) a pulse of a logical unit is received, which is inverted into a logical zero through the open element 10 and closes key 3. The pulse count stops. At this moment the voltage the sinusoids have reached an amplitude value and remain constant.

This value is measured with high accuracy by a constant-current voltmeter.

To calibrate the amplitude levels of negative-polarity electrical signals, switch 14 opens and

opens elements 8. 8. At the first input of the element 10, a logical zero is output, at the output of which a logical unit occurs, which opens the key 3 and the counter continues counting pulses. At the output of the counter

4, corresponding to a phase of 3 l / 4, a pulse of a logical unit appears, which through open elements AND 8, 9 will open element AND 10 At the output of this element, AND a logical zero will appear and close key 3.

The counter will stop. The voltage of the sine wave reaches the amplitude of the negative half period and remains constant. After calibration, the switch 15 should be set to the closed state, the element And 10 will close, which will bring the device into the operating mode (the position of the shifter 14 in the operating mode can be any). A sinusoidal oscillatory process is established at the output of the DAC.

Claims (1)

Apparatus of the Invention A device for calibrating amplitude levels of electrical signals of multi-level centrifugal and xi generators, containing a sequentially connected master oscillator, a frequency control block, a counter with n outputs, a memorized block, a digital index and a preference gel, an output stepped attenuator, a DC meter differing from by that. In order to improve the accuracy of calibration and adjustment of amplitude levels, a control key and a phase selection logic block are inserted in it, containing two two-channel AND elements, a three-input AND element, two EXCLUSIVE OR elements, a capacitor, and two switches of the two-input element I is connected to the l + 1 output of the counter, and the second input is connected to the first switch and the second input of the second two-input element And the first input of which is connected to the outputs of the first two-input element And, you, the second The rail of the travel element I is connected to the atom input of the three-input element I, the first input of which is connected to the 1-output of the counter, and the third input of the three-input element I to the winding switch and the first inputs of the two elements EXCLUSIVE OR, the output of the first element EXCLUSIVE OR is connected to the second input of the second element is EXCLUSIVE OR and a capacitor, the output of which is connected to the; RESERVE of the counter, the second outputs of the switches, the persea element EXCLUSIVE OR, and the coupling capacitor j-ji with a common bus.