SU1661721A1 - Device for checking and control of item winding equipment - Google Patents

Abstract

The invention relates to automation and computer technology and can be used in control systems of automated technological systems for the production of winding products. The purpose of the invention is to expand the field of application of the device. The goal is achieved by the fact that in a known device comprising a software control unit, a RAM unit, first and second serial interfaces, a display, first, second and third parallel interfaces, a deviation board, a timer unit, an interrupt controller, a remote control unit, a print unit , the OR element, additionally introduced a block of permanent memory, a fourth parallel interface, a block of discrete signals, a group of deviations sensors, a group of units, including a serial interface, a console its location, a programmable controller, a group of position sensors of mechanisms and a group of actuators of actuators. The introduction of new elements allows the software to control and monitor the process of production of the product, it is easy to reconfigure the device to a new process and to frighten the operator about the progress of the process. 14 il.

Description

The invention relates to automation and computer technology and can be used in control systems of automated technological systems for the production of winding products.

The purpose of the invention is to expand the field of application of the device.

FIG. 1 shows a functional diagram of the device; in fig. 2 - device operation algorithm

va when solving problems of control and management of the technological complex; in fig. 3 shows an algorithm for the operation of device blocks during data entry; in fig. 4 - processing algorithm and the exchange of information between the units of the device; in fig. 5 is an example of a specific technical solution of the software control unit 1; in fig. 6 - the same, serial interface 4; in fig. 7 - the same

Lock 8 timers; in fig. 8 - the same, ontroller 9 interrupts; Fig. 9 is about the same, the remote control 10; on ig. 10 - the same, parallel interests 13-15; in fig. 11 is the same, block 17 of the memory of discrete signals; in fig. 12 - the same, console 21 workplace; in fig. 13 is the same as the programmable controller 22; on ig. 14 shows an algorithm for operating a programmable logic controller.

The device (Fig. 1) contains a program block 1 of control, a block 2 of RAM, a block 3 of permanent memory, a first serial interface 4, a display 5, a third parallel interface 6, a board 7 of deviations, a block 8 of timers, an interrupt controller 9 , control panel 10, second serial interface 11, print unit 12, second 13, fourth 14 and first 15 parallel interfaces, OR element 16, discrete signal memory block 17, deviation sensor group 18 and for each unit 19 of the technological complex a serial interface 20, ult workstation 21, a programmable controller 22, the sensor group 23 and the drive mechanism positions a group of actuators 24, the address bus 25 and data bus 26 (-to zitsi E 27-52 are designated communication between blocks).

| The software control unit 1 (Fig. 5) comprises a clock pulse generator 53, a central processing unit 54, a system controller 55 and a reset button 56.

Serial interface 4 (FIG. 6) contains address decoder 57, communication interface 58, transmitter and receiver clock generator 59, input 60 and output 61 channel amplifiers.

Timer unit 8 (FIG. 7) contains a 62 second pulse generator, address decoder 63 and programmable timers 64 and 64.

The interrupt controller 9 (FIG. 8) comprises an address decoder 65 and a programmable interrupt controller 66.

The control panel 10 (FIG. 9) contains the start button 67, the stop button 68 of the device, the first 69 — even

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Vertical 72 elements NAND, element OR 73 and trigger 74.

The parallel interface 13 (FIG. 10) comprises an address decoder 75 and a peripheral interface 76. The parallel interface 14 (FIG. 10) comprises an address decoder 77 and a peripheral interface 78. The parallel interface 15 (FIG. 10) comprises an address decoder 79 and a peripheral interface 80.

Block 17 of the memory of discrete signals (Fig. 11) contains the first 81 ,, ..., 81t, and the second 824, ..., 82p trigger groups and the first 83, ..., second 84, (, ..., 84r, groups of elements OR.

The work station console 21 (Fig. 12) contains the first 85 and second 86 amplifiers, the first 87 element is NOT, the first 88 is the third 90 elements AND-NOT, the second 91 elements are NOT, the fourth 92 are the sixth 94 elements AND-NOT, the third 95 elements NOT, the seventh 96 is the ninth 98 elements NAND, the fourth 99 is NOT, the first 100 and the second 101 lamps, the first 102 are the fourth 105 buttons.

The programmable controller 22 (FIG. 13) contains a program block.

106 control blocks operational

107 and a permanent 108 memory, a serial interface 109, the first 110 and the second 111 parallel interfaces.

The device works as follows.

All the programs for monitoring and controlling the device are recorded in block 3 of the permanent memory. The memory of programmable logic controllers 22 records the movement control mechanisms of each unit 19. Each program provides for the execution of the control algorithm of the corresponding unit 19 sequential steps, and depending on the combination of sensor signals 23 positions of the mechanisms installed on unit 19, the necessary commands are issued power up, actuators 24 actuators. In addition, a step counter is organized in each program, the contents of which are incriminated after the next step of the program. Thus, in each moS1661721

The time unit on unit 19 executes a program step, the number of which is one less than the number recorded in the step counter.

When the device is turned on, the software control unit 1 at the output 31 generates a pulse, according to which the device blocks are set to their initial position (operator 1, figure 2), after which the software control unit 1 executes the mode initialization program of blocks 4, 6, 8, 9, 11 , 13, 14 and 20 (operator 2, figure 2).

For serial interfaces 4, 11, and 20, asynchronous, two-way simultaneous data transfer is specified. For parallel interfaces 6 and 13, all channels are switched to output mode, the first channel of parallel interface 14 is in input mode, the second channel is in output mode. All channels of the parallel interface 15 are reset to input mode.

For block 8 timers, numeric setpoints are set. For the interrupt controller 9, the starting addresses of the interrupt service routines are set.

Then, the software control unit 1 starts testing the input program for the shift task recorded in the persistent memory unit 3 (operators 3-7, fig.2). Using the keyboard, dipole 5 introduces the operator for each version of the product to be manufactured on each of the units 19 in accordance with the shift task, the plan, the release cycle and the parameters of the product (the variable part of the work program of the unit 19: for example, when winding the stators of electric motors coils to be manufactured in a cycle, the number of coils in a group, the number of turns in coils, etc.), as well as the permissible values of defects by types in a batch of products.

These data are entered in the dialog mode by filling in the tables sequentially displayed on the display screen, with the numerical value of the requested parameter being entered in the place of the table indicated by the marker. Each character of the specified data is transmitted by the transmitter of the display 5 in serial code to the input

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receiver serial interface 4 (line 36).

The serial code received at the input of interface 4 is converted last into a parallel code, which is fed to the program control unit 1 via the data bus 26, and then to the dedicated zone of the operational memory 2.

The device is put into operation by the operator by pressing the corresponding key (operators 3, 18, 19 and 20) on the control panel 10, with the result that at its output 40 a signal is issued to allow the operation of the timer unit 8, and at the output 38 a signal is generated which 9 interrupts are transmitted via communication 34 to program block 1 of control.

According to this signal, the software control unit 1 proceeds to the development of the data entry program in the programmable controllers 22 of each of the units 19 (operators 11-17), while from the operational memory unit 2 (via the data bus 26, the software control unit 1 The serial interface 0 interface 20 introduces into the memory of the controller 22 a product winding program, the production of which is foreseen first on this shift, and from the block 3 of the permanent memory, control information that sets the controller to automatic mode. zhdogo unit 19 is started by a signal from the respective remote workstation 21, which receives at input 46 of the programmable controller 22.

The testing of the program of the unit 19 is carried out in a cyclic mode; in this case, according to the program recorded in the controller 22, the sensors of the 23 positions of the mechanisms are polled, a logical comparison of the states of the inputs and 0 outputs is made, and according to the results of comparison actuators 24 drives. After the next program step has been worked out, the number in the counter of 5-step steps of the programmable controller 22 is increased by one, and after the end of the manufacturing cycle of an assembly product from output 4 8 programmable controller 22 at first

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the input of the discrete signal memory block 17 receives a pulse. The second inputs 50 of the block 17 receives signals from the sensors 18 deviations of the parameters of the products installed on the test equipment (not shown).

The latter controls the parameters of the products, determines whether it is suitable or not, and reveals, in the latter case, a manufacturing defect (when testing the stators of electric motors, for example, resistance deviation, wire breakage, stator short circuit or short circuit), which results in one of the sensors 18 .

Block 17 of the memory of discrete signals contains a group of triggers, each of which memorizes one of the signals stochastically arriving during a cycle at its first and second inputs.

The first timer of the block 8 with the complex operation clock forms on one of the outputs 39 an interrupt signal (second level), which through the interrupt controller 9, the communication line 34 enters the program control unit 1, which by this signal (operators 3, 18, 19, 25 and 26 (FIG. 2):

reads through inputs of 51 bits of the first channel of the fourth parallel interface 14 the contents of the triggers of block 17 of the memory of discrete signals, enters into one of its internal registers, and then reads the word through the outputs of 52 bits of the second channel of the same interface returns to block 17 of memories of discrete signals, set to the initial state of exactly those triggers from which the signals were sent,

analyzes the word read from block 17 of the memory of discrete signals, and for those units 19 from which the signal about the manufacture of products was received, reads the number from the corresponding cell of block 2 of the operational memory, adds to the read unit number and writes to the same cell, similarly, accumulates from the beginning of the change in the size of the marriage of each species,

analyzes the state of the equipment: if the unit received a signal to manufacture the product, its operation is recorded, did not arrive for the first time - no release, did not enter

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a second time is a simple unit (idle time is considered if there is no release for a given clock cycle — two consecutive control cycles) in the latter case, the software control unit 1 via the data bus 26, the parallel interface 6 issues 7 deviations on the corresponding signal lamp on the display 7; ;

analyzes the word read from discrete signal memory block 17, and writes a code corresponding to the test result to a specific cell of the RAM block 2, while in the RAM block 2 the results of the specified number of recent tests are stored (test batch test results) ,

calculates the number of defective items of each type in the control batch, compares with the permissible values and, if there are elevations through the data bus 26, the parallel interface 6 sprinkles the signal on the board 7 deviations,

monitors the progress of the planned tasks by each unit 19 by comparing the planned and actual number of products recorded in the RAM block 2, if they are equal, the program control unit 1 via the data bus 26 sends the parallel interface 13 to the corresponding work station console 21 .

According to this signal, the operator of the unit 19 by pressing the corresponding key on the console 21 of the workplace requests the program for winding the next version of the product, as a result of which one of the inputs 43 of the bits of one of the channels of the parallel interface 15 enters the input 41 of the controller 9 interrupts which generates an interrupt (first level) signal to the program control unit 1, which reads the contents of the parallel interface 15, determines where the program request came from, and then provides a record from the requested memory from block 2 of the main memory via the data bus 26, the program control unit 1 and the serial interface 20 to the programmable controller 22 of this unit 19. When the program is finished recording, the program control unit 1 sends a light to the control unit 21 via the parallel interface 13 signal and changes the address of the cell of the main memory unit 2 for accumulating information

0 the release of this unit of the selected version of the product (operators

3, 18, 19 and 22-24).

Second block timer 8 s. tact

1min at the second of the outputs 39 generates an interrupt signal (the third level), over which the equipment simply accumulates time (operators 3, 18, 19, 27 and 28). At the same time, the program control unit 1:

for those units 19 for which a simple number is fixed, reads the number from the corresponding cell of the operational memory unit 2, adds to the read number of the unit and writes to the same cell,

for those units for which the operating state is fixed, cleans the corresponding cell of the RAM block 2.

In addition, the software control unit 1, from the moment the device is put into operation by counting minute pulses, ensures the accumulation in the memory unit 2 of the current working time.

To diagnose the cause of a simple aggregate 19, the operator dials his code using the keyboard 5 of the code through serial interface 4 and the data bus 26 enters the program control unit 1 Last through the data bus 26, the successive interface 20 accesses the programmable controller 22 of the selected aggregate 19 and reads the contents of its step counter. Then, the software control unit 1, using the received number in the program, refers to the permanent memory unit 3, reading from it a message about the cause of a simple unit (such messages, for example, when winding the stators of electric motors can be: No stator, wire break, There is no rotation of the table, the Block r1 winding has not completed a cycle, etc.), and to the RAM block, reading the time from it is just an aggregate

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19. This data from the software control unit 1 via the data bus 26, the serial interface 4 is fed to the display screen 5. The operation of the device in this case is determined by operators 3-5, 9 and 10.

The signal of the control of the rhythm of the winding of the products (the fourth level interrupt signal) received from the third timer of block 8, the program control unit 1 calculates the difference between the current working time and the useful time (product tact of winding the difference in the number of manufactured and rejected products). If this difference exceeds the allowable value, the software control unit 1 generates a deviation signal from the specified rhythm, which via the data bus 26, the parallel interface 6 enters the 7 deviations board (operators 3, 18, 19, 29 and 30). The device allows to obtain, upon request of the operator, information on the progress, winding of the products by the complex (how many products are manufactured and left to be manufactured at the time of the request, deviation from the given rhythm in minutes, numbers of units that are idle), the reason and time just in minutes of any unit, about defective products (size, allowable and actual marriage in the control lot and from the beginning of the shift differentially by type of marriage). At the same time, the corresponding requests entered by the operator via the keyboard of the display 5 are received via the serial interface 45 data bus 26 into the program control unit 1, which, as a result of processing the data in block 2, creates an information array arriving through data bus 26 and serial interface 4 on display screen 5 (operators 3-10).

In the event of an emergency, the operator presses the Stop key on the remote control 10, with the result that the interrupt controller 9 sends an interrupt (zero) signal to the program control unit 1, causing the latter to work out the corresponding program (operators 3, 18, 19, 21 and 33- 39).

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The signal of the end of the shift (interrupt signal of the fifth level) generated by the fourth timer of the block 8 of the timers print block 12 records the total data on the operation of the complex for the shift, which comes from the RAM 2 via the program control unit 1, the data bus 26 and the serial interface 11 (operators 3, 18, 19, 31 and 32).

Fig. 3 illustrates the operation algorithm of the program control unit 1, the operational unit 2 and the permanent 3 memory and the interface.

4 when entering data from the display 5 (in figure 2 - the operator 7).

The software control unit 1 provides a display output.

5 from block 3 of the permanent memory of the name of the next parameter (operators 1-14), after which the device enters the mode of waiting for the value of this parameter, which the operator must enter using the keyboard of the display 5.

The reception by the software control unit 1 of the data and their entry into the memory unit 2 is carried out with the help of operators 15-24. The data exchange between the serial interface 4 and the display 5 is carried out by a serial code in a two-way simultaneous transmission mode (operators 6, 7 and 16, 22). When the software control unit 1 is the transmitting side, it controls the correctness of the exchange by comparing (operator 11) the information symbol sent with the received retransmitted. In the presence of distortions, the exchange of information is stopped (operator 12). The data exchange is carried out according to the commands of the software control unit 1. When executing any command, the software control unit 1 of the address bus 25 issues an address code to the inputs of the device being accessed; control signals generated by the software control unit 1 occur at the outputs:

27 information processing and response - when executing the read command 55 TSSH) on the requirement to interrupt

block 3 of permanent memory,

28 - when executing a command to write to memory block 2,

program execution. The central processing unit 54 of the block is powered by clock pulses

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29 and 30 - when executing commands for writing and reading information in the serial interface 4.

Via the data bus 26, the information is received from the outputs of the software control unit 1 to the inputs of the main memory unit 2 (Write command to the memory) or serial interface 4 (Write command to the I / O device), or from the outputs of the fixed memory unit 3 ( read memory command) or serial interface 4 (read I / O device command) to the inputs of the program control unit 1.

During the operation of the device between its blocks, data is exchanged that occurs during the execution of program instructions (Fig. 4).

When the device is turned on, the software control unit 1 at the output 31 generates a reset signal, according to which the blocks 4, 6, 10, 11, 13, 14, 15, 17 and 20 are reset to the initial state (operators 1 and 2). Then from the program control unit 1 the address of the cell of the fixed memory 3 enters the address bus 25, and the output 27 receives the read signal from the memory block, as a result of which the command code from the fixed memory unit 3 goes to data bus 26 software block 1 control (operator 3). The operation code is decrypted (operator 4), and all subsequent actions completely depend on what command was selected from the block 3 of permanent memory.

Possible options for the transmission of information are presented in the table.

The program block 1 of control i also processes the data (operators 56 and 57), monitors the presence of an interrupt signal after executing each program command, goes to the corresponding service subroutine (operators 58-60) and returns to the interrupted program (operators 54 and 55).

The software control unit 1 (FIG. 5) addresses the device units, exchanges information with them via the data bus lines, and logs the program. The central processing unit 54 of the unit is driven by the clock pulses of the generator 53, also fed to the input 32 of the software control unit. When power is applied or the button 56 is pressed, the generator 53 generates a reset signal, which is outputted to output 31 and provides for setting the central processing unit 54 to its initial state, after which it starts functioning from the zero memory cell. Access to the program, located in block 3 of the permanent memory, is accomplished by accessing consecutive memory cells. At the same time, the contents of the command counter of the central processing unit 54 are output to bus 25. The data flow on the data bus is controlled by the signals receiving the MI and issuing a database of information outputted from the central processing unit 54. At the end of the first clock cycle of each computer cycle, the central processing unit 54 sends the state information to the data bus, which is detected in the system controller 55 by a strobe pulse, coming from the generator 53. This information tells you what action the central processing unit element 54 will execute in the current machine cycle, and is also used to control data streams on the other 26 data, while the system controller 55 generates the commands Memory read (output 27), Write to memory (output 28), Write to device input-output (output 29) and reading input-output devices (output 30).

When an interrupt request is received at input 34, the contents of the command counter (current address of the interrupted program) are written to the STACK (area of block 2 of the operating memory) and the interrupt enable signal is output at output 33, which provides for reading the commands and the addresses of the interrupt service subroutine controller 9 experiences in software block 1 control.

Serial interface 4 (FIG. 6) converts a parallel data format received over the data bus 26 into a serial one, as well as the reverse conversion of a serial data format.

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received from the display 5. The interface uses the asynchronous mode of operation of the communication interface 58. Address decoder 57 selects interface 4 in the address field of software control unit 1. In this case, the lowest address of the bus 25 address, connected to the input of the U / D (Management / / data) of the communication interface 58, provides input to the interface 58 of a command or data when a recording signal arrives (input 29), outputting a status word or data from the interface 58 upon receipt of a reading signal (input 30). Synchronization of the receiver input (DSS) and the transmitter output (PDS) of the communication interface 58 is performed by the clock pulses of the generator 59, and the interface 58 is synchronized with the software control unit 1 - the pulses - incoming at the input 32. The input 60 and output 61 channel amplifiers provide the necessary -parameters of interconnection with the display 5.

The initialization of the serial interface is performed by a signal received at input 31. The mode is set before starting operation during the initialization process, and a control word corresponding to the two-way simultaneous transmission mode is entered into the communication interface 58. The synchronization of information exchange between the software control unit 1 and the serial interface 4 is performed by a software interrogation by the software control unit 1 of the interface word status control unit 4, which contains information about the readiness of the transmitter of the communication interface 58 to receive data from the software control unit 1 and about the readiness of the receiver interface 58 communication to transfer data to the software unit 1 control.

The timer unit 8 (Fig. 7) is designed to generate temporal pulses, which are used in the device as interrupt signals of a certain level, which enter the controller 9.

The address decoder 63, when the higher bits of the bus 25 have the desired signal combination, selects (VM communication line) one of the programmable timers 64. The lower bits of the bus 25 go to the timers 64 directly and provide access (links A) to each of the counters. The time settings are received via the data bus 26 and inputted by a write signal (input 29).

The inputs of the CO and C1 receive the generator pulses of 62 second pulses. The output of the counting of the first counter programmed to the setpoint of 1 min, the timer 64 is connected to the inputs CO and C1 of the timer 64g. The reception of pulses by the timer counters is enabled by the signal 40 received from the control console 10 to the inputs of the clock. When the content of any counter is equal to zero, one of the outputs of the block 39 results in a signal that can be used as an interrupt request signal of the software control unit 1.

The interrupt controller 9 (FIG. 8) allows the implementation of a multi-level vector interrupt system. The address decoder 65 provides for the selection of a controller in the address field of the software control unit 1. The programming of the controller is carried out by initialization commands before starting its operation. These commands specify the starting addresses of the interrupt service routine. The command output by the controller is made via the data bus 26 on the Record signal (input 29). Interrupt requests from external devices are received at inputs 38, 39 and 41, as a result of which the controller sends an interrupt signal to the software control unit 1. When receiving from the last interrupt acknowledge signal, the controller outputs to the data bus 26 a command and the starting address of the interrupt service routine.

When the button 67 (or button 68) of the control panel 10 is pressed (FIG. 9), a start signal (or a stop signal) of the device appears at one of its outputs 38 and is fed to the input of the interrupt controller 9. During operation of the device (from pressing the button 67 to pressing the button 68), the trigger 74 is in a single state and gives permission (output 40) to the operation of the block 8 of timers. The initial setup of the trigger 74 is carried out at the input 31 through the element OR 73. The elements AND-NO 69-72 are necessary to form a single

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impulses when pressing buttons 67 and 68.

Parallel interfaces 13-15 (FIG. 10) provide synchronous data exchange in parallel data format with 21 workstations consoles and a discrete signal storage unit 17.

The decoders 75, 77 and 79 select, respectively, the interfaces 76, 78 and 80 of peripheral devices in the address field of the software control unit 1. At the same time, the lower bits of the bus 25 addresses connected to the A (Address) inputs of interfaces 76, 78 and 80 provide access to each of the I / O channels or the control word register of the corresponding interval.

The initialization of the interfaces is carried out by a signal arriving at input 31, and all their channels are put into data entry mode.

The modes are set before starting work in the initialization process, while the control word is entered into the interface 76 of the peripheral devices corresponding to the output mode of all its channels, and the interface 78 is entered the word corresponding to the input mode for its first channel and output for the second one.

The information received from the program control unit 1 via the data bus 26 is stored in the buffer register of the corresponding channel (the address of which is present on the bus 25) via the write signal (input 29) and is immediately transmitted to its outputs.

When entering information, the data from the channels is written to the buffer registers of these channels without gating and then, upon receipt of a read signal (input 30), are transmitted to data bus 26.

The triggers 814, ..., 81t, 82, ..., 82 of the block 17 of the memory of discrete signals (Fig. 11) are reset when the device is turned on by a reset signal received from the program control unit 1 through the third input 31 and respectively elements OR 83, ..., 83W and 844, ..., 84ft.

The first 48 and second 50 inputs of the unit are stochastically during the operation cycle of the technological complex, signals are received from the second outputs of the programmable logic controllers 22 (about the end of production of the product of the respective units) and from the sensors 18 deviations of the product parameters. These signals are stored in the corresponding block triggers. The software control unit 1, after polling the state of the triggers through the inputs 51 of the first channel of the parallel interface 14, ensures that the triggers from which the signals were sent are reset to the initial position. At the same time, the installation signals from the program control unit 1 are received via the outputs of the second channel of the parallel interface 14, the third block inputs 52 and the elements OR 83, ..., 83 m and 84 ..., 84П.

The cycle of operation of each unit 19 of the complex begins when the button 102 is pressed on its console 21 (Fig. 12), and a signal is sent from the output of the element HE 87 to the second input of the programmable controller 22.

The software control unit 1 of the device monitors the progress of the planned tasks by each unit by comparing the planned and actual quantities recorded in the operational memory block 2. When they are equal, the processor, via the parallel interface 13, sends a task execution signal to the corresponding console 21 of the workplace, which is fed to the amplifier 86, causing the lamp 101 to light up, and the elements AND-NO 90, 94 and 98, preparing them for operation. By this signal, the operator of the T9 unit, by pressing one of the keys 103-105, requests the program for winding the next version of the product, resulting in a signal to one of the input channels of the parallel interface 15, which ultimately leads to the recording of the requested program in the programmable controller 22 of this unit 19. At the end of the input, program control unit 1 via parallel interface 13 sends a signal to amplifier 85, with the result that lamp 100 lights up.

Elements AND-HE 88 and 89 (AND-HE 92, 93, 96 and 97) are required for

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single pulse, respectively, when you press one of the buttons 103-105. The elements AND-NOT 90, NOT 91 (AND-NOT 94, NOT 95, AND-NOT 98 and NOT - 99) ensure that no signals are simultaneously present at the first outputs of the remote control 21 while simultaneously pressing the buttons 103-105, and signal from the button pressed before.

The programmable controller 22 (FIG. 13) is problem-oriented for the tasks of software and logic control of the equipment. Its software control unit 106, the operational unit 107 and the permanent memory 108, the serial interface 109, the first 110 and second 111 parallel interfaces and the connections between them are made similarly to respectively the program control unit 1, the operational unit 2 and the permanent memory 3, serial interface 4, parallel to interface 15, parallel to interface 13, and the links between them.

The programmable controller 22 provides control of the unit 19 in accordance with an algorithm implemented as a program stored in the persistent memory unit 108. The latter is the source of instructions for the software control unit 106, which it samples at the address determined by its instruction counter. The cycle of operation of the unit 19 starts at a signal from the console 21 workplace, which is fed to the second input 46 of the programmable controller 22 (the first input of the parallel interface 110). In accordance with the program, the software control unit 106 polls, via the parallel interface 110, position sensors of the mechanisms 47 and 47), a logical comparison of the states of the inputs with those provided by the program and, according to the results of the comparison, sends commands to the parallel interface 111 to turn on the actuator wires. After working off the next program step (completion of the next technological operation, for example, acceleration of the spindle drive to the nominal speed, winding a predetermined number of turns of the coil, stopping the spindle, turning the foot and

. e.) The program control unit 106 increases by one the number in the program step counter, which is located in the operational memory unit 107. After the end of the manufacturing cycle of the product by the unit 19, the software control unit 106 provides for outputting a signal from the first output 48 of the second parallel interface 111 (the second output of the controller) to the block 17 of the memory of discrete signals.

In the communication modes of the programmable controller 22 with the software control unit 1, the winding program data codes are recorded in the operating memory unit 107, which are received via the serial interface 20 and the serial interface 109 of the programmable controller 22 from the program control unit 106, which reads this data from block 2 RAM, reading the reason code just from block 107 RAM through the serial interface 109 of the programmable controller 22 and the serial interface 20 to software block 1 control.

The algorithm operators (Fig. 14) perform:

1 - the initial installation of the programmable controller 22; 2, 3, 16-19 — output from the programmable controller 22 the contents of its step counter to determine the state of the aggregate 19 (operation or reason is simple);

2, 3, 4, 6, 7, 9-15 - input into the programmable controller 22 of the parameters of the product to be manufactured on unit 19;

8 - control of start of the unit 19 in operation, 1

4, ..., 6, 25, ..., 27 - control the duration of the current work cycle;

20,. ,,, 23 - performing operations at the control step,

24, 28, ..., 30 - the end of the work cycle.

The device can also be used to monitor and control various technological complexes in discrete manufacturing, both in the electrical and other industries.

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Claims (1)

Invention Formula The control and management unit of the technological complex for winding products, containing a software control unit, a RAM unit, first and second serial interfaces, a display, first, second and third parallel interfaces, deviation scoreboard, timer unit, interrupt controller, remote control, printing unit and an OR element whose output is connected to the interrupt input of the interrupt controller, the interrupt output of which is connected to the interrupt request input of the software control unit, whose address outputs This is connected to the address inputs of the main memory unit, the first, second and third parallel interfaces, the first and second serial interfaces, the timer unit and the interrupt controller, the read output of the software control unit is connected to the read input of the main storage unit, the information inputs / outputs of which integrated by data bus  with the information inputs / outputs of the software control unit, the first and second serial interfaces and the interrupt controller, with the information inputs of the timer block, the second and third parallel interfaces, and with the information outputs of the first parallel interface, the write output into the program control memory is connected to the write input block operational PA0 m ti, write output to external blocks 0 five the I / O of the software control unit is connected to the write inputs of the second and third parallel interfaces, the first and second serial interfaces, the Interrupt controller, and the timer block whose interrupt outputs are connected to the second group of interrupt controller inputs, the output output of external I / O blocks the software control unit is connected to the read inputs of the first and second serial interfaces and the first parallel interface; the output of the software connection control unit is reset With the reset inputs of the first, second and third parallel interfaces, the first and second serial interfaces and the control panel, the interrupt outputs of which are connected to the first group of interrupt inputs of the interrupt controller, the sync output of the software control unit is connected to the synchronous inputs of the first and second serial interfaces, the outputs of which connected, respectively, to the outputs and inputs of the display unit and the print unit; the output resolution of the software control unit interrupt is connected to the permission input p Interrupt controller interrupts, the outputs of the third and parallel interfaces are connected to the inputs of the status board, the permission output of the control panel is connected to the resolution input of the timer block, which is designed to expand the application area of the device. memory, the fourth parallel interface, a discrete signal storage unit, a deviation sensor group, and an aggregate group, each of which includes a serial interface, a workstation console, a programmable controller, a group position sensors of mechanisms and a group of actuators of executive mechanisms, the inputs of which are connected to the corresponding control outputs of a group of programmable controller, the control output of which is connected to the corresponding discharge of the first group of installation inputs of the memory block of discrete signals, the second group of installation inputs of which are connected to the outputs a group of sensors of deviations, the outputs of the sensors of the positions of the mechanisms are connected to the corresponding information inputs of the group of the programmable controller, the information output of which is connected to the information input of the serial interface of the unit, the information output of which is connected to the information input of the programmable  . Q g 0 5 about „, - five the controller, the address outputs of the software control unit are connected to the address inputs of the fourth parallel interface and the serial interface of each unit of the group, whose informational inputs and outputs are connected to the data bus, the write output to the external input / output units of the software control unit is connected to the write inputs of the fourth parallel interface and the serial interface of each unit of the group; the output of the reading of the external I / O units of the software control unit is connected to the read inputs the serial interface of each unit of the group and the fourth parallel interface, the information outputs of which are connected to the reset inputs of the discrete signal block; the information outputs of which are connected to the information inputs of the fourth parallel interface, the reset output of the software control unit is connected to the reset inputs of the fourth parallel interface, the serial interface of each unit group and block of memory of discrete signals, the sync output of the software control block with The serial interface of each unit of the group is connected to the synchronous input, the corresponding bits of the information outputs of the second parallel interface are connected to the information inputs of the console of the workplace of the corresponding unit of the group, the information outputs of the console of the workplace of each unit of the group are connected to the corresponding inputs of the first parallel interface The workplace is connected to the enable input of the programmable controller. Data source Data receiver Operators al | Litter Cell block 2 RAM Cell block 3 permanent memory Program block 1 control Program block 1 control - 5-7 laziness 5,6,8 Control register of serial 9-12 interface 4 Register of transmitter of serial 9-13 interface 4, display 5 The control register of the serial interface 9,14-16 11 The register of the transmitter serial 9,14-17 interface 11, the device 12 printing Control register of a serial 9.18-20 interface 20 Register of a transmitter of serial 9.18-21 interface 20, programmable controller 22 Timer of block 8 timers 9,22,23 Controller 9 of interrupts 9,24,25 Parallel interface 13, consoles 21 workplaces 9.26-28 Parallel interface 14, 9,29-31 block 17 of memory of discrete signals Parallel interface 6, 9,32-34 scoreboard 7 deviations Cell block 2 operational 52,53 memory Program block 1 control 35-37.39 35-39 35.40,41,43 35,40-43 35,44,45,47 35,44-47 35.48.49 35.50.51 (Naialo f one Initial device installation Initialization of block modes W, 9 ,, eleven Interface selector for 1st controller v 412 input array | winding program 6 controller | 13 Automatic resolution controller mode &about Yaouoyoy about & 6c Poll controller, interrupt input of the array of the winding program into the controller input and analysis of Orio / le equipment data Accumulation times Rhythm control equipment robots Registration totals Dan / jc FIG. 2 (continued) (Start one - Sending character sequential the code from the register of the transmitter on the display 5 / Receiving code retransmitted about a character display into an interface receiver's register at input the contents of the register of the state of interface 4 to processor 1 and, Lriems another interface & ready to issue data Yes ten VZOD the contents of the register receiver interface 4 8 processor f eleven Code comparison transmitted and relayed characters 12 ( S No ft Formation addresses next cell YAZ U Yes ten -M / 5 Fig.Z 15 Forming the address of the RAM cell, 8 which is entered the first bit of the parameter value Receive serial hell character 6 register receiver interface 4 v / 7 input the contents of the registry register of interface 4 to processor 1 Reception 18 No Interfaces ready for Data Delivery W bridge the contents of the register of the receiver of the interfaces S processor f 20 Record p sp yes squirrels / S parameter from the processor / t 21 w / Sod bottom of processor 1 to regis / p of the C interface transmitter v 22 Transmission / soda relayed characters from the register of the transmitter on the display 5 23 p, squirrels D0 / Lorometro 6 Ozd prin Not 24 Address Formation next RAM cell FIG. 3 (continued) t not Shig.Ch zg Not Fig 1 {continuation t) Reception of a serial code from a flea 5, conversion 6 fla-rolloin code 39 Transfer of number from the block 4 8 5 / uk 1 50 No 3 block address ft. Yes Receiving a sequential stroke from block 22, preobrozie B parallel code Reception of a losleobatelny code from the fst block Sending sign requests for service from lulmob 21 via the block fS S 5lok1 43 g 4T Transfer of the number of 5l eye 8blok1 i 4 (Continued2) th The formation of a block 1 signal 27 Transfer from the 3ft / 3 stack unit to the program command / address address of the program 8 12 13 16 17 20 21 23 J / F F H ЖЖЖ А А А ЖЖ Ж 25 28 31 M 39 43 47 49 51. d 1} tkluui / t 5 D Stroys / L- in performing arithmetic or logical operations unit 1 Formation by block 1 of a signal 28 Record in block 2 to the content stack command counter to return to the interrupted program jo t 60 Formation by unit 1 of a JJ signal. Reading the command and address of the interrupt service routine from block 9 6 5kl 1 FIG. 4 / continuation3} T J 5 Mf 7l. I9qi Fig.d Of} one n 9 i i J IZZI99 40 and, tZt ,, 46 W J / 11 T Riga 13 No W Fm.m Logging the UTadress of the current program command / ten Receive starting address block 107 start winding / eleven Lriem character from block 109 Extract from the block 107 addresses / baking program command Yes 13 85lock 101 character record v # Formation next address block 101 FIG. M continuation 4) sixteen Entering in block W7 addresses / next / shchy command / lrogrammb / 17 Reception cell address U7 {afesa. C (/ e / 77 / Ј / ha step) v 18 w / Sod S 1O9 unit with cvmvt / xa steps (f / fada (w / h / lros / lo)) 15 / nineteen Extract from the U7ofes / another # 0 block of my programs / 20 V8od Dagpsch / Kob signal via BUT block Tos / lo No / tm da / TwuxoS coomSemc / 7 i building / m 21 Yes 21 The contents of the tap steps Ibelichi / Yab on f V 23 conclusion ci / gnal on drives through block 111 IfwjT works ogrega e / p cha jffx0Mve # {End of FIG. M (continuation 2)  cycle is greater than A given No 26 27 Unmute, #elect8 issue a signal 28 W / give a signal from the idle / in the laziness of the product 8 block 17 m 29 Cve / 77V (// r steps set 6 position O  Hongprol // e / 77 ler disconnected F 2