SU1647517A1 - Programmed timing device - Google Patents

Abstract

The invention relates to devices for automatic software control of technological processes. The purpose of the invention is to simplify and increase reliability. The device contains a launcher. controlled power supply unit, memory block, program block, first and second command highways, pulse generator, controlled frequency divider, time counter, command number counter, reprogrammable code memory, protection and signaling unit, first and second delay elements, first and a second single vibrator, a switching unit, a block of delay elements. This device interrupts one program and starts another when the technological parameters of the controlled object deviate or according to a signal from the command block. The control commands in both cases are formed by the same command number counter and, depending on which program is running, are supplied by the switching unit to the first or second command line. The power supply of the nodes that form the control commands is switched on only for the duration of the program run 5 or less. 1 tab.

Description

The invention relates to automation, in particular to automatic control devices, and can be used to programmatically control various technological processes in the energy, gas, oil and other sectors of the field.

The aim of the invention is to simplify and increase the reliability of a software temporary device.

Figure 1 is given a functional diagram of the software temporary device; Fig. 2 is a schematic of a controlled power supply unit; FIG. 3 is a diagram of a protection and alarm unit; 4 a program block of memory.

control signals, in FIG. 5, the one-shot.

The program temporary device contains a generator of 1 pulses, a controlled divider 2 frequencies, a counter 3 times, a reprogrammable block 4 of code memory, delay elements 5 and 6, one-oscillators 7 and 8, a counter 9 of the command number, a switching block 10, a program block 11 , block 12 of delay elements, start block 13, controlled power block 14, storage unit 15, block of protection and signaling, command highways 17 and 18, power bus 19 and output group 20.

ABOUT

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The power supply unit 14 contains RS-flip-flops 21 and 22, a NOT element 23, a delay element 24, an OR element 2, NOT 25 and 26, an OR element 27, a switch 28, which includes the Power line 29 of the transistor 30 and a resistor 31.

The protection and alarm unit contains signaling sensors 32, logic signal shapers 33, AND 34 elements, RS flip-flops 35, acknowledgment authority 36, indicator lights 37, power amplifiers 38 and OR element 39,

The control signal store contains a group of 40-40p trigger points.

The mono-vibration 7 contains an RS-flip-flop 41, an element OR 42, differentiating RC circuits, consisting of capacitors 43 - 45 and resistors 46 - 48.

When describing the operation of the device and its individual nodes, the following notation of logical signals is taken: T is a high voltage level, O is a low voltage level or its absence.

The controlled frequency divider 2 has a counting input, a reset input, data input inputs for setting the conversion factor, and an output. The conversion factor, the value of which depends on the parallel code combinations of logical signals arriving at the data input inputs of the frequency divider 2, determines the dimension (range number) of the formed time interval. The number of frequency dividers corresponds to the number of ranges of time intervals being formed. The counting input of the first frequency divider is the counting input of the controlled frequency divider 2. The reset inputs of all frequency dividers with a constant conversion factor are combined and form the reset input of the splitter 2 frequency. The inputs of the frequency dividers through the elements 2 and are connected to the multi-input element OR, the output of which is the output of the controlled frequency divider 2. The second outputs of the 2I elements form the inputs of the data entry of the divider 2 frequency. At its output, when there is no reset signal, an output signal is received from that frequency divider, the output of which is connected to the first input of element 2I, which has a signal at its second input equal to 1. If a reset signal arrives at the reset input of the frequency divider, 2 a constant value of the signal, for example 0. With the removal of the reset signal, the division of the frequency of the input signal is resumed in accordance with the set coefficient.

Time counter 3 has a counting input, a reset input, inputs of parallel input in the binary code of the installation data

account, record entry and output, where the signal changes when the counter contents coincide with the entered data.

Reprogrammable unit 4 provides the conversion of code combinations of logical signals at its address inputs into a dimension code (range number) on the first group of output buses and a code

the duration of the formed time interval on the second group of output tires. Such a unit can be performed by any known method. For example, in it, each output bus is connected to a common bus through an appropriate resistor, and programming is performed by switching on between the output bus and any address bus of the corresponding diode by the anode to the address bus or disconnecting a previously installed diode. The number of address buses corresponds to the number of time intervals formed during the start and stop programs of the control object. The number of output tires of the first group corresponds to

the number of dimensions of the formed time intervals, and the number of output tires of the second group, the number of bits of the parallel code of their duration.

Elements 5 and 6 of the delay in any known manner so that they delay the output logic signal relative to the input logic signal for a time equal to or slightly longer

the propagation time of the counters 9 and 3, respectively. Moreover, the delay element 6 should provide a delay only a slice of the input pulse signal. Such delay elements may contain a series-connected integrating RC circuit and a threshold element.

Single-oscillators 7 and 8 are designed to generate one positive pulse when a logical signal is received at any of its inputs, equal to 1.

Counter 9 of the command number has a counting input, a reset input and a bit outputs. If there is no reset signal, counter 9

provides an account of the command number, forming 1 at that bit output, the number of which corresponds to the command number. At the other outputs, the signals must correspond to O. On the first bit output, immediately after turning on the power supply, 1 is set.

The switching unit 10 has a group of inputs, two groups of outputs and a control input. The presence of a signal equal to T at the control input should ensure that the inputs are connected to the second group of outputs, and when a signal equal to Oi arrives at the control input, to the first group of outputs. This block can be performed by any known method and, for example, it contains two groups of elements 2I, the number of which in each group is equal to the number of inputs of the switching unit 10. The outputs of elements 2I of the first and second groups form the first and second groups of outputs of block 10, respectively, their first inputs connected to the inputs of this unit, the second inputs of the second group of elements 2I are connected to the control input of the unit 10 directly, and the second inputs of the first group of elements 2I through a logical inverter.

The program block 11 has three groups of inputs, one group of outputs and is intended for transmitting signals from the inputs to the outputs according to a specific program.

Block 12 of the delay elements contains several delay elements, the inputs of which form the inputs of the block, and the outputs - the outputs of the block. Delay elements can be made similarly to delay elements 5 and 6. Block 12 is intended for the backup formation of the most responsible commands for controlling the trunk 17 (start commands for the controlled object).

The most responsible commands of the control of highway 17 are such commands, the formation of which in the PWU for any reason after the formation of the previous one by one number of commands can lead to emergency situations at the controlled object. Therefore, such commands arriving at the first inputs of software block 11 are reserved (backed up) by the output signals of block 12 delay elements arriving simultaneously (or with permissible time errors) to the third group of inputs of software block 11, the first and third inputs of the last can be combined with each other in this block. The output signals of block 12 are formed by the time delay of the input signals, which are the commands with numbers one less than the numbers of the responsible commands. Thus, the responsible commands are formed simultaneously in two ways: using a block of 12 delay elements and a counter 9 of the command number, which provides an increase in the reliability of the PSP.

The start block 13 is designed to generate the start signal of the start program () or the stop program () of the controlled object, interrupt the start program and start the stop program by a signal from block 16 protection and alarm, block the start of the start program by a signal from the third output of block 15

Block 13 may contain an RS trigger,

The R-input of which is connected to the output of element 2IL, the output to the output of element 2I, and the inverting input to the output of the starting unit 13. The first input of element 2IL is connected to the input of unit 13, the second input of which is connected via the inverter to the first input of element 2И. The second inputs of elements 2I and 2ILI are connected respectively to the start-up and stop programs start-up authorities. By the program launching authority for the start-up unit 13 is meant an element ensuring the formation of an output signal equal to 0 before and after the operator’s influence on it and a signal equal to 1,

0 when exposed to the operator. Such an organ can be made by sequentially turning on the closing button and a resistor between the positive and common power bus, and the output of the start organ is formed by the junction point of the resistor and the button. In addition, measures should be taken to install the RS flip-flop in the state O at the time when the power supply of the starting unit 13 is turned on, for example

0 connecting a capacitor between the R-input and the positive power rail. When the power is turned on, a signal equal to 1, from the positive power bus, goes through a capacitor in the form of a pulse to

5 R-input of the trigger and sets it to the state O (at inverting output 1), therefore, at the output of the starting block 13, the signal Zo is equal to T. With the help of the program launch authority (START) in the absence of the second

0 input of block 13 of the blocking signal equal to 1, the RS flip-flop switches to state 1, while the output of block 13 is set to a signal equal to O. Using the start program of the stop program

5 (STOP) or when a signal start signal of 1 is received at the first input, the RS flip-flop is set to the initial state, and the output signal of block 13 is equal to T.

0 Controlled power supply unit 14 is intended to turn on the power supply voltage of nodes 1-12 only for the duration of the programs for starting or stopping the control object. Managed unit 14 should include

5 power supply of the indicated nodes by the start-up () or stop () start-up signals, and disconnect it by the last start () or stop () commands, respectively. Moreover, the power supply of the indicated device nodes by the signal Zo ° 1 is turned on only if

Prior to the launch of the facility, a Zi-1 control command is generated. Otherwise, if during processing of the start-up program, the signal to start the stop program comes before the formation of a command, the power supply to the nodes 1-12 of the device should not turn on, therefore, the start of the stop program does not occur. Such an algorithm of operation of the controlled power supply unit 14 makes it possible not to start the shutdown programs of the object, if a control command is not formed at the start, after which the start of this program is necessary. For example, prior to this command, at start-up, only preparatory operations are performed to set the controlled object to a certain state, and in case of interruption of the start-up program, the object is stopped by simultaneously shutting down all its actuators, i.e. without forming time intervals. Such a controlled power supply unit 14 can be performed on the subcircuit shown in Fig. 2, where it contains RS-flip-flops 21 and 22, whose R and S inputs form the first to fourth inputs of block 14, respectively.

The storage unit 15 has control inputs, a first, a second group of outputs, and a third output. This unit is intended for storing signals arriving at the control inputs. When a signal equal to 1 is received, the reset input values of the output signals of block 15 should be set to the initial (initial) state.

The protection and signaling unit 16 is designed to interrupt the start-up program of the controlled object and start the program to stop it with maximum deviations from the technological parameters, as well as to indicate the reason for the stop. The signals arriving in a predetermined sequence at its inputs allow monitoring of signals from sensors of technological parameters. When a monitored emergency signal arrives, unit 16 generates at its output a logic signal equal to G, which, arriving at the first input of start unit 13, interrupts the start program and starts the stop program of the controlled object.

The block 16 is reset to its initial state by applying to the R-inputs of all the flip-flops 35 a signal equal to T, with the aid of the authority 36 acknowledgment after the emergency situation disappears or after the signals 16 equal to O are received at the first inputs of the block 16.

The device works as follows.

When the power is turned on, the output of the start-up unit 13 is set to a signal, the output of the controlled power supply unit 14, therefore, on the power supply bus 19, there is no voltage. Therefore, nodes 1-12 do not receive power, which means that the values of all the Zi-Zn control commands and

Xi-Xm in trunk x 17 and 18, respectively, are equal to 0. This causes the software unit 11 and the storage unit 15 to form certain signals (see table) that ensure that the control devices of the control object are reset to their original state and enable the protection and signaling unit 16. control of signals from sensors of some technological parameters. If at this time block 16 is not

fixes the emergency, i.e. its output signal arriving at the first input of the starting block 13 is equal to O, then with the help of the corresponding organ of the block 13 it is possible to start the start program. When

This happens, the output signal of the block 13 takes the value that is fed to the input of the software block 14 of the power supply and ensures the inclusion of the power supply voltage at its output and the power supply bus 19. With

This de-energized device nodes are energized, the generator 1 starts to generate pulses, while the one-shot 8 delivers a single positive pulse, which, arriving directly at the reset inputs of counter 9, is the number of commands, the storage unit 15 and through the one-shot 7 to the reset inputs of the controlled frequency divider 2 and counter 3 times - sets them to the initial state - O. At the same time, the output pulse of the one-shot 7 through the delay element 6 is fed to the recording input of the counter 3 time and is delayed there for a while element 6. In addition,

after switching on the power supply of the nodes 1–12, the switching unit 10 provides for switching the inputs with outputs connected to the trunk 17 of the commands. Since when the power is turned on

the first output of the counter 9 of the command number takes place I, and on the rest of its outputs O, then this T as a control command Zi 1 through the switching unit 10 and the command line 17 is fed to the first input

- the first group of program block 11. This leads in accordance with a predetermined program to the formation of 11 output signals by the program block, which are stored by the storage unit 15 In addition, the command is sent to the first address input of the first group of inputs of the reprogrammable block 4, on all other address inputs of which the signals remain equal to O. This ensures the formation of a parallel dimension code on the first group of its outputs and a parallel code of the duration of the first time interval on the second group which by

step respectively on the inputs of the input

data of the controlled frequency divider 2 and counter 3 times. By the time the specified code signals arrive at the data input inputs of the splitter 2 frequency and the time counter 3, the value of the output signal of the single vibrator 7 at their reset inputs remains equal to 1, therefore, the output pulses of the generator do not change their state. Only after the output signal of the one-shot 7 takes the value O, the pulses from the output of generator 1 through frequency divider 2, dividing them by a factor specified by the dimension code, begin to flow to the input of counter 3 times. After supplying O to the reset inputs of the splitter 2 frequency and the counter 3 time for some time, determined by the delay time of element 6, at the input of the record of counter 3, the signal remains different 1. At this time, the counter 3 is inputted from the second group of outputs of the reprogrammable block 4 data for the account. Before the first pulse arrives at the counting input of counter 3, a delay signal 6 is set at its input by the delay element 6, which blocks the data input inputs of counter 3. Therefore, counting data entered immediately before the feed O is entered at the recording input. After that, the formation of the first time interval begins.

At the end of a predetermined time interval when the number of pulses counted by the counter 3 times coincides with the number entered into it at the data entry inputs during recording, a signal equal to O is generated at its output, which provides a shift 1 from the first output of the counter 9 of the command number to its second output and, therefore, from the first bus of the command line 17 to its second bus. Thus, the command 2i takes the value O, and 2d the value 1, the values of the remaining control commands do not change. Such a change of commands leads to a shift 4 from the first address input of the reprogrammable unit1 4 to its second address input of the first group and from the first input to the second input of the first group of program block 11. At the same time, block 4

five

0

5 0 5 0 5 0

5 0 5

generates the code of the second time interval and feeds it to the inputs of the data input of frequency divider 2 and time counter 3, but before the recording signal arrives, the state of counter 3 does not change. Program unit 11 in accordance with a given program generates new output signals, which are stored by block 15 and arrive at its outputs. After the delay time specified by element 5, from its output, the first input of the one-shot 7 enters 1. which leads to the formation of a single pulse corresponding to the value 1. This The impulse, acting on the reset inputs, sets the divider 2 frequencies and the counter 3 times to the state O and simultaneously enters through the input 6 of the entry entry of the counter 3. After changing the output signal of the one-shot 7 V to O, the data input is set A new factor of recalculation of the divider 2 frequencies and the recording of data for counting by the counter 3 times. Upon expiration of the delay time specified by element b, at the input of the record of counter 3, the signal takes the value O, which blocks its data entry inputs. The second time interval begins. Further, the processes of forming time intervals are repeated and the control commands Z3 ... Zn, equal to 1, are formed similarly to the command 7.2.

The most important commands for controlling the highway 17 are reserved by signals arriving at the third group of inputs of the program block 11 from the outputs of the block 12 delay elements. These commands are formed by block 12 according to the previous control commands of the highway 17 by means of their time delay equal to the corresponding time intervals generated by the counter 3 times by the same commands.

If, prior to the formation of a Zrt command for any reason (by a signal from block 16 of protection and signaling or from a shutdown body of block 13), the launch of the controlled object is interrupted and the signal Z0 takes the value 1, then by this signal the controlled block 14 power off power supply of nodes 1-12 and returns it to its original state, which is maintained until the next start of the start-up program. At the same time, by the signal ZoHl, the one-shot 8 generates a pulse signal 1, which ensures resetting the storage unit 15 to the initial state.

If the start program is interrupted after a command arises, the device returns to its original state as in the previous case, but after the time delay specified in the controlled power supply unit 14, the power supply of the nodes 1-12 is re-enabled and the controlled object stop program starts up in which all processes are run, as when the start-up program is started. The only difference is that after turning on the power supply of the indicated nodes, the switching unit 10 provides the signal for the input signals to the outputs connected to the command line 18, to which the Xi-Xm control commands generated by the counter 9 equal 4. the moment of formation by the storage unit 15 by a signal from the program unit 11 is output to the third output a signal equal to T, which, being fed to the second input of the starting unit 13, blocks the launching of the start program for the entire time programs Partial stop controlled object. In the last command, the acutely controlled power supply unit 14 switches off the power supply of the nodes 1 to 12 and the device is transferred to the initial state.

When the start-up program is completed by forming the ZnHl command, then by this command, the controlled power supply unit 14 turns off the power supply to the nodes 1-12, and they are put into storage mode, saving their resource and saving energy. In this state, the device is before the start of the stop program,

In case of an emergency deviation of any technological parameter monitored by the protection and signaling unit 16, when the start-up object is started up or after its windows haven, after an indefinite period of time, 1 is formed at the output of the unit 16, which, at the first input of the start-up unit 13, ensures installation at its output, signal 7.0, equal to 14. This signal, as described above, causes the start program to be interrupted if it is generated when the object is started, and the start of the stop program. The reason for interrupting the start-up program, indicated by the corresponding indicator lamp 37 of block 16, can be acknowledged with the help of the appropriate organ 36 of this block, both during the execution of the stop program and after its completion.

During the development of the shutdown program of the controlled object, as well as during the start-up, emergency situations can occur, which are fixed by the protection and alarm unit 16. Once the shutdown program has been completed and an analysis of the causes of emergency situations has been carried out, block 16 of the initial state can be brought through the acknowledgment authority 36. In this case

the output of block 16 is set to a signal equal to O.

Improving the reliability of the proposed device contributes to the introduction of a block of delay elements, which provides for the reservation of the Formation of the most responsible control commands during the development of the facility start-up program.

20

Claims (1)

Invention Formula A software temporary device containing a start-up block, a control signal block, a reprogrammable code memory block, a control block power supply, the program block, the first and second groups of inputs of which are connected to the first and second command lines formed by the command buses, g also a pulse generator, the output of which connected to the information input of the controlled frequency divider, the output of which is connected to the counting input of the time counter, the reset input is connected to the reset input of the time counter, the input element the delays and the output of the first one-shot, the first input of which through the second delay element is connected to the output of the time counter and the input of the command number, the first and second groups of outputs of the reprogrammable code memory block are connected to the inputs of the data of the controlled frequency divider and the switch, respectively time record entry which is connected to the output of the first the delay element, the first run of the start-up unit is connected to the output of the protection and signaling unit, the output of the controlled power supply unit is connected to the power buses of the pulse generator controlled by the divider frequency, time counter, command number counter, the first one-shot, the programmable memory block of codes, the first and second delay elements, and the first through fourth inputs of the controlled The power supply unit is connected respectively to the output of the start-up unit, the bus last. The i-th command of the first command line, the last command of the second command line, characterized in that to simplify and increase the reliability of the device, a switching unit, a block of delay elements and a second one-shot are entered into it, the first input of which is connected to the output of the controlled power supply unit, the second input is connected to the output of the starting unit and the control input of the switching unit, and the output is connected to the second output the first one, the reset inputs of the command number and the reset input of the memory of control signals, the control inputs of which are connected to the outputs of the program block, the first group of outputs forms the outputs of the device, the second the group of outputs is connected to the inputs of the protection and alarm unit, and the third output is connected to 0 the second input of the startup block, the first and second groups of address inputs of the reprogrammable code memory block are connected to the command buses of the first and second command lines, respectively, formed by the first and second groups of outputs of the switching unit connected by the inputs to the counter outputs of the command number, part of the first command bus connected via a block of delay elements with the third group of inputs of a software block, whose power bus, as well as the power bus of the block of delay elements and switching unit eye connected to the output of the controlled power supply. g 5x " 04 U | si (S f N J i Trunk teams tire mashtali 17 18 and 23 u xixix Second Entry FIG. five