SU1635289A1 - Receiver of digital tone signals - Google Patents

Abstract

The invention relates to a technique of digital signal processing and can be used in electrical and radio communications to detect single-frequency signal information in the background of noise. The aim of the invention is to increase the reception noise immunity by reducing the sampling rate. For this, the receiver contains an analog-to-digital converter 1, a synchronizer 2, a spectrum inverter 3, a discrete low-pass filter 4, a decimator 5, a band recursive filter 6, a module calculation unit 7, and a drive 8. The filter 6 is operated at frequencies lower than the value specified counting theorem. 3 ill.

Description

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The invention relates to a technique of digital signal processing and can be used in electrical and radio communications to detect single-frequency signal information in the background of noise.

The aim of the invention is to increase the reception noise immunity by reducing the sampling rate.

Figure 1 shows the block diagram of the device; 2 shows time and frequency dependencies illustrating the process of spectrum conversion before bandpass filtering; FIG. 3 shows timing diagrams of the formation of clock signals in the synchronizer.

The digital tone receiver (Fig. 1) contains an analog-to-digital converter (ADC) 1, a synchronizer 2, a spectrum inverter 3, a discrete low-frequency filter 4 (LPF), a decimator 5, a band recursive filter 6, a module 7 for calculating the module, a memory 8 .

The receiver works as follows.

The input analog signal is digitized using the ADC 1, the sampling times correspond to the positive fronts of the signal Ua (Fig. 3a) supplied to the clock input of the ADC 1 from the first output of the synchronizer 2.

With the help of the spectrum inverter 3, an operation is performed which involves inverting the sign of the even samples.

In accordance with this, the operation of the spectrum inverter 3 may be due to the processing of the sign bit of the output signal of the ADC 1 by an EXCLUSIVE OR element with inversion, the second input of which is supplied with the signal 11C3 (Fig. 3b) from the third synchronizer input 2. At 11C3 0, the sign bit is inverted when Uca 1 remains unchanged. The spectrum inversion process is shown in Fig. 2b, where it can be seen that the neighborhood of the frequency fo (the frequency of the useful signal) is converted into the vicinity of the frequency Rd / 2 - fo, where Rd is the sampling frequency (frequency of the signal Uci, fig.Za). Transferring the neighborhood of the frequency fo to the low-frequency region allows discrete low-frequency filtering of discrete low-pass filters 4 with a cut-off frequency fcp (Fig. 2d) to be significantly less than Pd / 2, while the useful information now in the vicinity of Pd / 2-fo does not lost. As a discrete low-pass filter 4, for example, a non-recursive transversal filter can be used. The input signal of the low-pass filter 4 U4 is shown in FIG. 26, and its spectrum is shown in FIG. Limiting the spectrum to the frequency fcp РД / 2 allows to lower the sampling frequency of the signal before entering the band recursive filter 6, which is done by the decimator 5. The case shown in Fig. 2 corresponds to a decrease

the sampling rate is doubled (to the value of Рд / 2), while even counts, marked with crosses in fig. 26, are excluded from the stream of samples at the output of the low-pass filter 4. Decimator 5 can be built as a block of keys

0, the combined control inputs of which are supplied from the fourth synchronization output are a 11 cch signal (FIG. 3d). The 11Ch signal shown in FIG. 3C is used — when the sampling rate is reduced by a factor of 8. When lowering

5 sampling frequency 2 times the need for this signal is eliminated, and the decimator in this case is controlled directly by the signal 1) Sz (Fig. 3b).

Bandpass filtering at a frequency of Pd / 20 fo is performed by a recursive filter 6, which can be constructed as a second-order recursive link containing an adder, two delay elements and two multipliers.

5C using the module 7 for calculating the module and

drive 8 at a given time interval is estimated the magnitude of the spectral components of the signal being processed, concentrated in the vicinity of the signal

0 frequency. If the estimate is conducted by the average value of the filtered signal, then in block 7, the module is calculated by inverting the sign bit if its value corresponds to a region of negative magnitudes. If the estimate is based on the average energy of the filtered signal at a given time interval, then in block 7 squares of binary numbers are input to its input.

0 Drive 8 can be built as a series-connected digital-analog converter and integrator with a reset, or (in the digital version) as a first-order recursive element with a transfer function H (z) (1 -) 1 and periodically interrupted by a reverse feedback circuit. z, as a result of which the value accumulated in the adder is periodically reset to zero. Feedback Circuit Control

0 or (in the first of the given variants) the integrator reset is controlled by the control signal generated at the second output of the synchronizer 2 and fed to the clock input of the accumulator 8.

5 An estimate of the average value of a signal or the average value of its energy is thus produced over the interval between two adjacent pulses. To make a decision about the presence or absence of the signal component of the drive output signal

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8 may be served on some threshold device (not shown).

Claims (1)

DETAILED DESCRIPTION OF THE INVENTION A digital tone receiver comprising an analog-to-digital converter, a clock input of which is connected to a first output of a clock generator, a series-connected recursive filter, a module calculation unit and a drive, a clock input of which is connected to a second output of a clock generator, Schp W A A / D 1 A .. Ni. / 1 / ..ii-  V vl V V l / x Y - Ј - 1 H L GK. . Jj / at $ Au, n (f) S4 (fJ  fo FA 0 B that, in order to increase the noise immunity of the reception by reducing the frequency of the discretization, a series-connected spectrum inverter, a discrete low-pass filter and a decimator were introduced. the output of which is connected to the input of a recursive bandpass filter, the clock input of which is connected to the synchronizer's fifth output, the first, fourth and third outputs of which are connected respectively to the clock inputs of the discrete low-pass filter, decimator and spectrum inverter, whose input is connected to the analog output digital converter. 1U Рм.З