SU1631559A1 - Device for measuring parameters of dc drives - Google Patents

Abstract

The invention relates to computing and can be used to determine the parameters of electric drives of various mechanisms. The aim of the invention is to simplify the device. This goal is achieved by the fact that in a device for determining parameters of DC drives, containing a group of analog-digital converters 1, a generator of 8 clock pulses, a trigger 10, an element of HE 12, a group of el. OR 2, decoder 5, memory block 3, processing block 4, counter 6 and element 9, NOT element 13, group of elements OR 7, element OR 11 are entered, which allows eliminating the hardware setting for the specified time interval. 1 il.

Description

The invention relates to computer technology and can be used to determine the parameters of electric drives of various mechanisms.

The aim of the invention is to simplify the device.

The drawing shows a structural diagram of the proposed device.

The device contains a group of analog-to-digital converters 1, a group of elements OR 2, a memory unit 3, a processing unit 4, a decoder 5, a counter 6, a group of elements OR 7, a clock generator 8, an element 9, a trigger 10, an element 11, elements NOT 12 and 13 and a display unit 14.

The device operates as follows.

Suppose that it is necessary to periodically calculate and fix on the display unit the value of instantaneous power consumed by the motor anchor chain. Assume that the device uses analog-to-digital converters (ADCs) of parallel action.

From the output of processing unit 4, a single signal through the OR element 11 is fed to the reset input of counter 6, setting it to zero. The same signal through the element 12 is fed to the installation input of the trigger 10, setting it to a single state, thereby allowing the passage of clock pulses from the clock generator 8 through the element 9 to the counting input of the counter 6.

From the information output of the counter 6 to the input of the decoder 5, the device channel selection code is received, allowing the first ADC 1 to issue a code corresponding to the parameter of the first channel to the information input of the memory unit 3 through the first OR 2 element. The remaining ADCs 1 are closed by single signals at their enable inputs and their outputs are disconnected from the information input of the memory unit 3.

Since the code from the information output of the counter 6 through the group of elements OR 7 is located at the address input of the memory unit 3, and a clock pulse is received at the input of the recording permission from the generator 8 through the elements AND 9 and the element NOT 13, the information of the first channel from the output of the first ADC 1 is written in the first cell of block 3.

With the arrival of the next clock pulse from the generator 8 clock pulses' through the And 9 element to the counting input of the counter 6, a device channel selection code is established at its information output, according to which information from the second ADC 1 through the first OR element 2 of the group is fed to the information input of block 3. At the same time, from the information output of counter 6, the second channel select code is received as the address at which the information from the second ADC 1 to block 3 will be sent to the address input of block 3.

After the last parameter is written to the memory unit 3 in a cycle, when the counter goes to the zero state, an impulse appears at its overflow output, setting the trigger 10 to the zero state, thereby preventing the passage of clock pulses through the And 9 element;

In this case, from the inverse output of the trigger 10 to the input of the interrupt requirement of the processing unit 4 (microcomputer), an interrupt demand signal is received. On this signal, block 4 stops the computational operations and proceeds to the procedure for inputting and processing information from memory block 3.

With the exception of the first cycle of the device, the microcomputer processes and displays information about the parameters of the drives read in the previous cycle of the memory unit 3, and after the start of processing information, the data for which has already been received from the random access memory (RAM) of the microcomputer, in its output port the UOOOOv code is recorded, ensuring the reset of counter 6 and the setting of trigger 10 to a single state.

With the arrival of a single signal from the inverted output of trigger 10 to the input of the interrupt requirement of the processing unit 4, the microcomputer stops processing and proceeds to the procedure for entering information about the parameters of the electric drive from the memory unit 3 into the RAM of the microcomputer, for which a unit is entered into the output port of the microcomputer, setting the address of the first block cell 3, from which the microcomputer reads information about the parameter of the first channel in its RAM. ZateMg 'the contents of the output port is increased by one and in RAM the information on the parameter of the second channel is read, etc. When the output port contains an address that exceeds the final value, the input procedure is completed and the microcomputer proceeds to continue processing and display.

Thus, in each cycle of the device’s operation, information about the parameters of the electric drive obtained in the previous cycle of operation is displayed and information is received for the subsequent cycle of processing and display, i.e. there is a combination of time processing, display and reception of information.

Similarly, other parameters and characteristics of the electric drive can be calculated and displayed.

The device can be used microelectronics Electronics-60 15 VM-16 version 5 of 15 VM-16-002. The information display unit is connected to the central processor using the control device B1, which is part of the microcomputer. The remaining blocks are joined using the device 10 of the parallel exchange And 2 15KS180-032, which is part of the microcomputer.

The output buffer of the device And 2 is used as the information output of the microcomputer (output port), the input buffer of the device And 2 is used as the information input (input port), and the input of the device And 2 is used as the input of the interrupt demand. In addition, for the operation of the microcomputer in interrupt mode 20 requires a preliminary installation of the interrupt enable trigger in the And 2 device by setting the discharge state 06 of the And 2 device status register to a single state. 25

Claims (1)

Claim . A device for determining the parameters of DC electric drives, containing a group of analog-to-digital zo converters, a clock pulse generator, a trigger, a first element NOT, a first group of OR elements, a decoder, a processing unit, a memory block, a counter and an AND element, moreover, the information inputs 35 of the analogue digital converters of the group are information inputs of the device, allowing the inputs of analog-digital converters of the group are connected respectively to the outputs of the decoder, the input of which is connected to the output of the count sensor, the outputs of the analog-to-digital converters of the group are connected respectively to the inputs of the OR elements of the first group, the outputs of which are connected to the information input of the memory unit, the output of which is connected to the information input of the processing unit, the information output of which is the output of the device, characterized in that, 15, To simplify, it contains a second element NOT, an OR element, and a second group of OR elements, the output of the clock being connected to the first input of the AND element, the second input of which is connected to direct trigger output, and the output to the counter counter input and through the first element NOT to the memory block record input, the address input of which is connected to the outputs of the OR elements of the second group, the first and second inputs of which are connected respectively to the output of the address of the processing unit and the information output of the counter, input the reset and overflow output of which are connected respectively with the output of the OR element and the reset input of the trigger, the inverse output of which is connected with the first input of the OR element and the input of the interrupt requirement of the processing unit, yayuschy whose output is connected to a second input of the OR gate and via a second NOT member with a mounting trigger input.