SU1624436A1 - Device for displaying graphical data - Google Patents

Abstract

The invention relates to automation and computing and can be used to display graphical information from a computer. The purpose of the invention — an increase in the device life span — is achieved by introducing a pulse former and corresponding Functional Connections. The invention allows the removal of graphic information without altering the contents of the memory block in which it is stored. 5 il.

Description

The invention relates to automation and computing and can be used to display graphical information from a computer.

The goal of the invention is to increase the speed of the device.

FIG. 1 shows a block diagram of the proposed device; in fig. 2 is a block diagram of the control unit} in FIG. 3 - the same, the memory block; in fig. 4 is the same, video signal maker} in FIG. 5 - the same, the pulse former.

The device comprises an interfacing unit 1, a control unit 2, an in-synchronization unit 3, a memory block 4, a video signal forming unit 5, a pulse forming unit 6. The control unit 2 comprises a control signal driver 7, a counter 8, a block 4

memory contains a muddy worm 9, address switch 10, memory elements 11, register 12. Video signal shaper 5 contains a register of 13 modes, shift register 14, multiplexer 15, register 16. Pulse shaper 6 contains the first 17 and second 18 programmable counters, element OR 1e.

The device works in the following way.

Extinguishing frame pulses and frame sync pulses are generated in block 3 and set the frequency j-apro - In association with these pulses in programmable counters 17 and 18 (timers), form 6 begins the countdown of time, after which the output from this block is formed. restart counter 8 to feed

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generates information reading addresses from memory block 4. The addresses of memory block 4 begin to cycle from the initial value, and during the high level of the frame damping sync pulse the address count is blocked so that at the end of it the address continues to be recalculated, starting with the value reached at the end of the previous frame. Thus, changing the initial setting of the counter 17, it is possible to cyclically move (with the discreteness of one television line) information in the frame relative to the vertical scanning signal. Moving information to the number of TV lines corresponding to one character string provides a quick graphical shift of information up - ROLLING mode, without overwriting information in memory block 4. The memory elements 11, corresponding to the beginning and end of the frame, in this case move through the address space of the memory block 4, with the first row of the previous frame becoming the last row of the new frame, and all information in the frame rises to the row. In order to display the new information, in this way organized by the information shift mode upward, only the last line of the new frame is to be zeroed. The auxiliary timer of the forcer 6 (counter 18), set to the program-started strobe mode, serves to restart the counting address of the memory block 4 at the moment of reprogramming the initial installation of the counter 17 from the minimum to the maximum value in order to suppress the false image shift in the frame, since until the next restart of the counter 8, the main timer (counter 17) of block 6 has a time longer than the frame sweep time.

Video signal generator 5 (FIG. 4) allows information to be displayed in two modes. In monochrome mode, the mode register 13 registers the background color and the color of the light point, which arrive at the input of the multiplexer 15 as two tetrads of logical signals (R, G, B, I background and R, G, B, I points). The presence of a zero or a single signal from the output of the register 14 shift information encoding the glow point of the screen,

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0pechivaet switching of the corresponding R, C, B, I signals at the output of the multiplexer 15.

In the multi-color mode, two bytes of information adjacent to the addresses from memory block 4 are fed one to the shift register 14, the other to the multiplexer input to provide the R, G, B, I background signals and R, G, B, I points. The outputs of the register 13 modes while blocked. Thus, in bytes at even addresses encode graphic information in the same way as in monochrome mode, and odd bytes encode the luminescence and background colors for each group of eight horizontal points on the screen.

Thus, the proposed device allows to increase the speed in the information retrieval mode by providing the shift mode of the graphic information without changing the contents of the memory block in which it is stored.

Claims (1)

Invention Formula Use icTBo for displaying graphical information containing control unit 5 memory block, video shaper, synuronization block, interface block whose inputs-outputs are connected to the device inputs-outputs for connecting to a computer trunk, information inputs-outputs of the pair connectors are connected to the information inputs / outputs of the memory unit, the first information inputs of the video signal generator, the information inputs of the control unit and the synchronization unit, the outputs of which are synchronized Properties, address outputs of the interface block are connected by the first The address inputs of the memory block, the second information inputs of which are connected to the outputs of the control unit group, the first output of which is connected to the first control input of the memory block, the outputs of which are connected to the second information input of the video signal generator, the outputs of which are informational By the codes of the device, the control outputs of the interface block are connected to the second control input of the memory block, the first control input of the video signal conditioner, the transceiver. the out and the second control inputs of the control unit that controls the input of the synchronization unit, the first output of which is connected to the clock input of the control unit, the second output of which is connected to the clock input of the video signal generator, the second control input of which is connected to the second output of the synchronization unit, t is characterized by the fact that, in order to increase the speed of the device, it contains a driver ten 36 pulse, the output of which is connected to the third control input of the control unit, the information inputs of the pulse former are connected to the information inputs / outputs of the interface unit, the clock input of the pulse former is connected to the first output of the synchronization unit, the control input of the imager of the pulse generator is connected to the control input of the synchronization unit . WITH Local bus data ENT her Local bus tires J Address regeneration isoar / neni 7 J / Bz Address genes four j Sync pulses FIG. one g g general H 2 Fy I; f J17 Bf nineteen i