SU1599806A1 - Converter of parameters of capacitive pickups to frequency and period - Google Patents

Abstract

The invention relates to a measurement technique and can be used in devices for measuring electrical circuit parameters. The purpose of the invention — improving the accuracy of the conversion — is achieved by reducing the magnitude of the total error introduced by the variation of the exemplary measures and their instability. The converter contains reference voltage source 1, electronic switch 2, voltage-frequency converter 3, coupling capacitor 4, exemplary resistor 5, imbalance signal amplifier 6, synchronous detector 7, gating unit 8, integrator 9, capacitive sensor 10, whose parameters are converted in frequency and period. 7 il.

Description

fua.f

The invention relates to a measurement technique, in particular to devices for measuring electrical price parameters,

The aim of the invention is to improve the accuracy of the conversion by reducing the magnitude of the total error introduced by the variation of the reference measures and their instability.

Figure 1 presents the structural diagram of the proposed Converter; Fig. 2 is the same; converter voltage is frequency; in FIG. 3, the same, the disequilibrium signal amplifier; 4 is the same, gating unit; figure 5 - the same, synchronous detector; in fig. 6 - the same, the integrator; 7 shows timing diagrams explaining the operation of the proposed converter.

The transducer of parameters of capacitive sensors into frequency and period contains a source of voltage reference I, an electronic switch 2, a voltage-frequency converter 3, a coupling capacitor 4, an off-load resistor 5, an imbalance signal amplifier b, a synchronous detector 7, a gating unit 8, an integrator 9 and a capacitive sensor 10, the parameters of which are converted into frequency and period. The first and second inputs of converter 3 are connected to the positive and negative poles of source I, respectively, and the first output is connected to the first output for connecting the first output of capacitive sensor 10. The input of amplifier 6 is connected to the second output for connecting the second output of capacitive sensor. 10, and the output via serially connected detector 7 and integrato p 9 to the information input of transducer 3, the second output of which is the output of the transducer of parameters of capacitive sensors to frequency and period. The output of switch 2 is connected via a series-separated separator capacitor 4 and a resistor 5 connected to the input of amplifier 6. The first and second inputs of switch 2 are connected to the positive and negative poles of the source 1 of the reference voltages, respectively. The first input of the hz unit is connected to the control input of the switch 2 and the second output of the converter 3, and the second input to the first output of the converter 3. The output of the unit 8 is connected to the control input of the detector 7.

Voltage-to-frequency converter 3 (FIG. 2) contains the first electronic switch 11, the first fixed contact of which is the first input of converter 3,

The second fixed contact is the second input of the converter 3. The first fixed contact of the second electronic switch 12 is connected to the input of the analog inverter 13 and is

5 information input converter 3. The output of the analog inverter 13 is connected to the second fixed contact of the switch 12, the movable contact of which is connected through the resistor 14 to the inverting input of the operational amplifier 15 and the first terminal of the capacitor 16. The output of the amplifier 15 is connected to the second terminal of the capacitor 16 which inverts the input of the commutator 17 and is the first output of the converter 3. The inverting input of the comparator 17 is connected to the moving contact of the switch I1. Non-inverting amplifier input 15

Q is connected to a common tire. The output of comparator 17 is connected to the control inputs of switches II and 12 and is the second output of converter 3.

The unbalance signal amplifier 6 (FIG. 3) contains a resistor 18 and a capacitor 19, the first terminals of which are connected to the inverting input of the operational amplifier 20, which is

0 input amplifier 6 signal unbalance. The non-inverting input of the amplifier 20 is connected to the common bus, and the output is connected to the second terminals of the resistor 18 and the capacitor 19 and is the output of the unbalance amplifier 6.

 Gating unit 8 (Fig. 4) contains the first 21 and second 22 comparators, the outputs of which are connected respectively to the first and second inputs of the OR-HE element 23, the third input of which is the first input of the gating unit 8. The non-inverting input of the first comparator 21 is connected to the inverting input of the second comparator 22 and is the second input of the gating unit 8. The inverting input of the first comparator 21 is connected to the second output of the first resistor

five

WITH

five

24 and ne) the output of the second resistor 25. The non-inverting input of the second comparator 22 is connected to the second output of the second resistor 25 and the first output of the third resistor 26. The first output of the first resistor 24 is connected to the common bus, and the second output of the third resistor 26 is connected to the negative pole of the source food (not shown). The output of the element OR NOT 23 is the output of the gating unit 8.

The synchronous detector 7 (FIG. 5) contains a capacitor 27, the first output of which is the information input of the synchronous detector 7, the second output of the capacitor 27 is connected to a moving contact of the electronic switch 28, the first fixed contact of which is the output of the synchronous detector 7, and the second fixed contact is connected to the common tire. The control input (not shown) of the switch 28 is the control: its input is the synchronous detector 7.

The integrator 9 (Fig. 6) contains a resistor 29, the first output of which is connected to the nepBbiM contact of the switch 30, the second contact of which is connected to the negative pole of the power source (not shown). The second terminal of the resistor 29 is connected to the inverting input of the operational amplifier 31 and the first terminal of the capacitor 32 and is the input of the integrator 9. The non-inverting input of the amplifier 31 is connected to a common bus. The output of the comparator 33 is connected to the control input of the switch 30. The output of the amplifier 31 is connected to the second output of the capacitor 32 and the inverting input of the comparator 33 and is the output of the integrator 9. The non-inverting input of the comparator 33 is connected to the first output of the resistor 34 and the second output of the resistor 35, the first terminal of which is connected to the positive pole of the power source (not shown). The second terminal of the resistor 34 is connected to a common bus.

The proposed converter is designed as a compensation-bridge converter with balancing the instantaneous values of the currents flowing through the capacitive sensor 10 and the sample resistor 5. The voltage-to-frequency converter 3 is used as a controlled current source.

5998066ch

The proposed Converter works as follows.

The information input of the converter 3 is supplied with a positive polarity voltage from the output of the amplifier 15. Under the action of the voltage applied to the input of the operational amplifier 15, its voltage forms a JO with a triangular voltage.

The amplitude of this voltage is controlled by the comparator 17. A voltage 15 is applied to the non-inverting input of the comparator 17 (switch 11 from the outputs of source 1. The output voltage from the amplifier 15 is supplied to the inverting input of the comparator 17 and is compared to the value of the reference voltage supplied to the non-voltage - 20 Comparator 17 spinning input. Upon reaching the output voltage of amplifier 15 equal to Ug, comparator 17 is triggered and switches switches 2.11 and 12. This process 25 repeats periodically. Comparator output voltages The aperture 17 and the amplifier 15 (forming the integrator together with the capacitor 16) are shown respectively in Fig. 7, a, b. The voltage taken through the coupling capacitor 4 from the output of the switch 2 and applied to the resistor 5 is shown in Fig.7 In this case, the current flowing through the resistor 5 has j rectangular shape and phase coinciding with the voltage applied to it. To eliminate the saturation of the amplifier 6, a capacitor 4 is designed, the capacitance of which is chosen 40 from the ratio

D "in minimal output 5 frequency conversion j

R is the resistance of the reference resistor 5j С 4 - the capacitance of the capacitor 4. The current flowing through the capacitive 0 sensor 10 is shown in Fig.7, g. The error signal amplifier 6 is designed as a summing inverting amplifier on the operational amplifier 20, for example, for the input 5 voltage applied to the sample resistor 5, it is an integrating element, and for the voltage applied to the capacitive sensor 10, it is proportional. The chopper 18 is designed to set the operating point of the 2P amplifier for current-carrying current. Its value is determined from the ratio

--- g f c, R, MW: g

where R g is the resistance of the resistor

18; C, d - capacitor capacitance 19.

When the measuring circuit is unbalanced, the output voltage of the amplifier 6 (Fig.7, d) has a triangular shape and amplitude determined by the difference of the currents flowing through the reference resistor 5 and the capacitive sensor 10.

A two-threshold comparator is used as gating unit 3, the threshold value of which is determined by the ratio of resistors 24 - 26. The output voltage of block 8 taken from the output of the OR-HE element 23 is shown in FIG. 7, e. This voltage is applied to the control input of the synchronous detector 7, which is a differentiating element and simultaneously performs the function of the detector. The current flowing through the capacitor 27 in the steady state (at equilibrium of the measuring circuit) is zero. The constant voltage present at the output of the amplifier 20 is blocked by the capacitor 27 and, therefore, the accuracy of the device is not affected by the unipolar current pulses (when the measuring circuit is unbalanced) through the capacitor 27 is fed to the input of the integrator 9, the output voltage of which is controlled The value of the frequency of the converter 3 and, consequently, the magnitude of the current 1. flowing through the capacitive sensor 10, balances the measuring circuit. Sign exit. Whose voltage of the integrator 9 should be positive, which is the condition for the operation of the converter 3. Tl this into the structure of the integrator 9, the resistors 29, 35 and 34, the key 30 and the comparator 33. At the moment of switching on the converter, the sign of the output voltage of the amplifier 3 - random value. At zero or negative voltage at the output of amplifier 31, a comparator 33 is triggered, the non-inverting input of which is energized from a divider including resistors 35 and 34 equal to (2-3) U "

  cA.i./v (ofNc the maximum bias voltage of the comparator 33. At the same time the switch 30 closes, connecting the first terminal of the resistor 29 to the minus pole of the power source. At the output of the amplifier 31, a linearly varying voltage is formed, which upon reaching the voltage drop On the resistor 34, the comparator 33 is thrown into a logical zero state and opens the key 30. At the time the linear-varying voltage of the integrator 9 comes out, the converter 3 starts up and the comparator 33 and the key 30 do not have it.

The proposed converter is an astatic equilibration device, whose operation algorithm is based on equilibrating the currents flowing through the capacitive sensor 10 and the exemplary resistor 5. Therefore, the equilibrium condition is

RO ROPS

e in

dU

dt

R g

- the current flowing through the exemplary resistor 5;

dU

1 - g

Cx, dt flowing through the capacitive sensor 10.

The output voltage of the triangular form of the converter 3 changes in half the period T / 2 by 2 and, ' (from -Ujjr, to + Uefj), in connection with which the expression (1) results in

Uon

4Uon

FROM which determines the conversion capacity of the converter in the duration of the period T function of converting the capacitance into frequency

f -1-

T 4p; оС;

The use of the proposed converter in comparison with the prototype ensures a higher accuracy of the conversion by reducing the magnitude of the error introduced by the standard measures. In the proposed converter, one sample measure is used - resistor 5, and in the prototype - two model measures (sample frequency and sample capacitance), therefore the total error introduced by the variation of model measures and their instability is less in the proposed converter than in the prototype. In addition, the errors introduced by the connection line are reduced in the converter.

Claims (1)

Invention Formula A converter of capacitive sensor parameters into a frequency and period containing a coupling capacitor, a voltage-frequency converter, the first and second inputs of which are connected to the positive and negative poles of the voltage source, the first output of the voltage converter -frequency is connected to the first output terminal connecting the first pin of the capacitive sensor, the imbalance signal amplifier input is connected to the second pin intended for connecting the second pin of the capacitor the first sensor and an output - through the consecutively connected sinhron1599806 ten detector and integrator — with the information input of the voltage converter — the frequency, the second output of which is the output of the capacitance sensor parameters transducer into frequency and period, is different from that, in order to improve the accuracy of the conversion, Q an electronic switch, a gating unit and an exemplary resistor are introduced; the output of the electronic switch is connected via series-connected separator capacitor and reference resistor to the input of the imbalance signal amplifier, the first and second inputs of the electronic switch are connected to the positive and negative poles of the source of the reference voltage, the first input of the gating unit is connected to the control input of the electronic switch and the second output of the voltage converter 5 the frequency f, and the second input - to the first output transducer voltage - frequency, gating the output unit is connected to the control input of the synchronous detector. Phie. 2 Shigl ..ej 6 but L. FIG. 7