SU1577014A1 - Resonant converter - Google Patents

Abstract

This invention relates to electrical engineering and can be used in secondary power supply sources. The purpose of the invention is to reduce acoustic noise by increasing the lower limit of the switching frequency. In the resonant converter containing a controllable key, a transformer, a switching resonant circuit, and an output filter, a buffer resonant circuit consisting of a capacitor and throttles is introduced. The invention makes it possible to create power sources with a wide range of variation of load currents without generating acoustic noise. 2 Il.

Description

The invention relates to electrical engineering and can be used in sources of secondary power supply.

The aim of the invention is to reduce acoustic noise by increasing the lower limit of the switching frequency.

FIG. 1 is a schematic diagram of a resonant converter; in fig. 2 - diagrams of currents and voltages.

The converter contains input terminals 1 and 2. The input terminal 1 is connected to the collector of transistor switch 3, the emitter of which is connected to the input terminal 2 via the primary winding 4 of the transformer 5, the secondary winding 6 of which is connected to the first capacitor 9 and the diode 8 one of the terminals of the second throttle 10, the second terminal of which is connected to the second capacitor 11 and to the input of the DLC filter 12, consisting of a reverse diode 13, throttles 14 and the third capacitor 15 connected in parallel to the load circuit 16, while controlling

the output of the transistor switch 3 is connected to the output of the control unit 17.

Resonant Converter works as follows.

From a constant voltage source, a constant voltage is applied to the input terminals 1 and 2. The control output of the transistor switch 3 is pulsed from the control unit 17, which opens the transistor switch 3, through which a current flows, the pulse shape of which is close to sinusoidal due to the resonant properties of the first chain consisting of droplets 7 and capacitor 9. This current charges the first the capacitor 9 to a value approximately equal to twice the value of the voltage of the power source, reduced to the secondary winding of the transformer 5. After turning off the transistor switch 3 and closing the diode 8, the stored energy in by a moat, the capacitor 9 is transmitted through a buffer resonant chain consisting of second throttles 10

(L

WITH

cl

sj

about

and capacitor 11 and through DLC-filyr 12 to load 16.

The plots of FIG. Figure 2 shows the input current I0x (t), the capacitive current of the first capacitor 1Cc (0, the inductance current of the buffer chain LB (t), and the voltage on the first capacitor UCK (t).

In the proposed scheme (FIG. 1), the input current is equal to the sum

iux (t) icK (t) + lLB (t),

moreover, the inductance current of the buffer resonant ILB chain is not a constant value, but depends on the period T. In contrast to the circuit of the well-known converter containing a reverse diode, a DLC filter switched off of the first capacitance, which, k; recharge and capacitance, in the scheme of FIG. 1, such recharge is not only possible, but also desirable, since in this case an effective amplitude-frequency modulation (ACIM) is possible, in which a decrease in the frequency does not lead to an increase in the amplitude of the current 1 C but to her fall.

For this, it is necessary to rearrange the diode of the DLC filter and change the frequency (respectively, period T) to the right of point A (Fig. 2), i.e. to the right of the point when the voltage on the first capacitor takes the maximum possible negative value.

In this case, an increase in the period (i.e., a decrease in frequency), provided that the pulse duration tn varies slightly, decreases the fill factor, i.e. helps to reduce stress on the load.

At the same time, the current amplitude decreases.

1 -E-suit (T) I

h / s to

where Ј is the voltage of the power source; Lk, Ck are the inductance and capacitance of the resonant chain, respectively (here, UCK (T) is the residual value of the voltage on the first capacitor at the end of the period), since to the right of point A with an increase in T the absolute value of the multiplier decreases.

The largest difference in voltage E - (T) reaches at point A, and the smallest at point C. If the switching on period does not correspond to point B, as in FIG. 2, and point C, the process of charging the first capacitor is not composed and the voltage across the load drops to zero. Thus, a relatively small change in the period, and hence in the frequency, can significantly change the voltage across the load.

Selecting the parameters of the scheme (Fig. 1), you can

to achieve the optimal frequency response, providing an increase in the lower

What is the frequency limit, which means a reduction in acoustic noise.

Stable operation of the converter under the condition of constant wave resistances of the LiCi and UC2 chains is possible when the intrinsic frequency of the buffer chain is less than the frequency of LiCi by an odd number of times, and the most practical interest is when the frequency of undamped oscillations of the buffer resonant L.2C2 circuit times less than the natural frequency of the switching chain Ltd. In this case, the input current will pass through zero in

point in time to 1.5 St - This meets the conditions.

U.

Ci

k

C2

where 1i, 1.2, Ci, C2 - inductance and capacitance of the resonant circuit of the primary and secondary circuits. If key 3 is opened at time point to, then both resonant chains will be connected in series and the half-period of continuous oscillations of the combined circuit will be equal to

Hawk I Sae

0

five

0

 ; rV (U + L2)

Ci Ci

five

0 55

C1 + C2

where U, Ce - equivalent inductance and capacitance of the resonant circuit of the primary and secondary circuits. During the time tox, the voltage i ia to the capacitor Ci will reach its maximum possible negative value.

The minimum possible value of the period is equal to the commune TA + T.QK. As already noted, the regulation area should be to the right of point A (Fig. 2), therefore the period Tmin should correspond to the maximum possible frequency value

turn on the transistor Gmax- All

T MIN

This allows us to formulate the requirements for the choice of converter modes and its parameters as follows: IA - the duration of the current flow of the base of the power transistor should be equal to

TA 1.5 L.1 Ci: maximum switching frequency:

f

.H-4-f.

  - and 9LiCi l 2C2

the ratio of the parameters of the first and second resonant circuits: Li L2

Ci C2

Thus, the achieved positive effect, which consists primarily in raising the lower limit of the control frequencies, is due not only to the introduction of an additional buffer resonance circuit U, C2, but also to the permutation of the diode of the DLC filter, which is not connected parallel to the first capacitor 9, but parallel to the second capacitor eleven.

As a result, the voltage on the first capacitor U "may be negative, and the current through the choke of the ILB buffer chain will not be constant, but depends on the period T, which creates prerequisites for the effective use of the ACIMS and an increase in the lower limit of the control frequency.

All this allows to reduce the level of aku (static noise. In addition, the proposed

the resonant converter circuit allows

create power sources with a wide range of load current variations without generating acoustic noise.

Claims (1)

Formula A resonant converter containing serially connected controllable key and transformer primary winding connected to the input terminals, the secondary winding of which is connected via a diode and first choke to the first capacitor, forming a switching resonant chain, a DLC filter connected to the output terminals, and a control unit connected to connected to the input of a control key, characterized in that, in order to reduce acoustic noise by increasing the lower limit of the switching frequency, a connected parallel to the first capacitor, a buffer resonant chain of successively connected second throttles and a second capacitor, in parallel with which the input of the DLC filter is connected. FIG. one Fi.2