SU1565338A1 - Multilayer integrated circuit - Google Patents

Multilayer integrated circuit

Info

Publication number
SU1565338A1
SU1565338A1 SU4334645/21A SU4334645A SU1565338A1 SU 1565338 A1 SU1565338 A1 SU 1565338A1 SU 4334645/21 A SU4334645/21 A SU 4334645/21A SU 4334645 A SU4334645 A SU 4334645A SU 1565338 A1 SU1565338 A1 SU 1565338A1
Authority
SU
USSR - Soviet Union
Prior art keywords
photoresist
layer
substrate
conductors
integrated circuits
Prior art date
Application number
SU4334645/21A
Other languages
Russian (ru)
Inventor
В.А. Киселев
Н.Н. Пересветов
В.Г. Веселова
С.Б. Прокофьев
И.П. Степанова
Е.Л. Белов
Original Assignee
Ярославское научно-производственное объединение "Электронприбор"
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ярославское научно-производственное объединение "Электронприбор" filed Critical Ярославское научно-производственное объединение "Электронприбор"
Priority to SU4334645/21A priority Critical patent/SU1565338A1/en
Application granted granted Critical
Publication of SU1565338A1 publication Critical patent/SU1565338A1/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders

Abstract

FIELD: microelectronics. SUBSTANCE: first-level conductors are formed on insulating substrate by vacuum evaporation. Then photoresist layer, 0.9-1.1 mcm thick, is deposited on substrate surface and layer-to-layer junctions are formed in it. Phenolformaldehyde and epoxy resin base insulating paste is applied to photoresist surface by stenciling method according to pattern of interlayer junctions, and second-level conductor pattern is formed on paste surface. High adhesion of photoresist to both substrate and polymeric insulating paste provides for high reliability of integrated circuits. EFFECT: improved reliability of integrated circuits due to elimination of short circuits between conductors. 3 tbl
SU4334645/21A 1987-11-30 1987-11-30 Multilayer integrated circuit SU1565338A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
SU4334645/21A SU1565338A1 (en) 1987-11-30 1987-11-30 Multilayer integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SU4334645/21A SU1565338A1 (en) 1987-11-30 1987-11-30 Multilayer integrated circuit

Publications (1)

Publication Number Publication Date
SU1565338A1 true SU1565338A1 (en) 1996-02-27

Family

ID=60527435

Family Applications (1)

Application Number Title Priority Date Filing Date
SU4334645/21A SU1565338A1 (en) 1987-11-30 1987-11-30 Multilayer integrated circuit

Country Status (1)

Country Link
SU (1) SU1565338A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2796954C2 (en) * 2015-02-06 2023-05-29 Эсмоукинг Инститьют Сп. З О.О. Electronic aerosol generating device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2796954C2 (en) * 2015-02-06 2023-05-29 Эсмоукинг Инститьют Сп. З О.О. Electronic aerosol generating device

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