SU1554113A1 - Multistable flip-flop - Google Patents

Abstract

The invention relates to a pulse technique and can be used in various devices with several stable states. The purpose of the invention is to simplify the implementation of the integral performance and expand the scope. A multistable trigger contains N single-type cells, each of which is made on the first, third transistors of the first conductivity type and the second, fourth transistors of the second conductivity type, and load resistor, and also contains a switching transistor common to all cells and a resistor. The use of transistors of two types of conductivity in a multistable trigger allows one to simplify its implementation in an integrated design and to ensure separation in time of switching the cells on and off. 1 il.

Description

The invention relates to a pulse technique and can be used in various electronic devices of automation, remote control and computer technology.

The purpose of the invention is to simplify the implementation of the integrated design and expand the scope of application by dividing the multistable trigger cells by switching on and off the time.

The drawing shows a circuit diagram of a multistable trigger.

The multistable trigger contains l.l-l.n cells, each of which is made on the third 2 and first 3 transistors of the first conductivity type, the second 4 and fourth 5 transistors of the second conductivity type, the input

6 and 7 output wiring, load resistors 8, a switching transistor 9, a common resistor 10, a reset bus 11 and a power bus 12.

The emitters of transistors 2, 3 and 9 are connected to a common bus, the base of transistor 2 is connected to the input bus 6, the base and collector of transistor 3 are connected respectively to the collector and the base of transistor 4, the base of which is connected to the output bus 7 and connected via a load resistor 8 to the bus 12 meals. The collector of transistor 5 is connected to the collector of transistor 4, and the base of transistor 5 is connected to the second collector of transistor 2, the collector of transistor 9, the first collectors of transistors 2el-2.n and emitters of transistors 5.1-5.P, 4.1-4.P are connected together and ate through

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A power resistor 10 is connected to the power bus 12. The base of the transistor 9 is connected to the reset bus 11.

Multistable trigger works as follows.

When the supply voltage is turned on, the multistable trigger is set to the state in which all cells are turned off, all transistors of all cells are closed, on output lines 7.1-7.p. and at the collector of the transistor 9 high voltage levels.

To turn on the cell, i.e. to switch a multistable trigger to another steady state, it is necessary to apply a positive impulse to the input bus of one cell. Suppose that a positive impulse arrives at the input bus 6.1 of the first cell 1.1. Transistor 2.1 switches to saturation mode. Due to the current of the first collector, the voltage level at the collector of the transistor 9 decreases to 0.1-0.3 V (this level is determined by the voltage drop of the collector-emitter of the saturated transistor). Almost to the same level, the voltage at the base of transistor 5.1 decreases due to the current of the second collector of transistor 2.1. This determines the approximate equality of the voltages at the base and emitter of the transistor, the latter is closed. During the action of the input pulse, a change in the state of the multistable trigger (with the exception of the saturated transistor 2.1) does not occur.

Upon termination of the pulse on the bus 6tl, the base current of the transistor 2.1 stops and the process of resorption of carriers in the base of the transistor 2.1 о stops. In the working area of the first collector of the transistor 2С1 this process starts due to the current through the resistor 10. In the working area of the second collector the process is slower because the current through the emitter junction of the transistor 5.1 is absent at this moment. When the resorption process of carriers in the first collector region ends, the voltage on the first collector increases, which leads to Placing the emitter junction of transistor 5.1 in the forward direction and a base current of this transistor arises, which is determined by the resorption of carriers in the region of the second collector of the transistor.

There is a collector current transistor 5.1, which opens the transistor 3.1. The voltage level on the output bus 701 decreases when it becomes lower than the voltage level at the emitter of transistor 4'1, the latter opens and the current of its collector opens up more transistor 3'1 An avalanche-like process of saturation of transistors 3.1 and 4.1 occurs due to positive feedback over the current between their bases and the collectors. Thus, the first cell 1.1 is turned on and a low voltage level (0.1-0.3 V) is set at its output bus, i.e. the collector-emitter voltage of the saturated transistor 3.1. At the end of the resorption process, the carriers in the second collector region of transistor 2.1 decrease to zero the base current of transistor 5.1 and the latter closes. The first cell remains in the on state and is held at the expense of the current through the resistor 10 and the emitter junction of transistor 4.1, while the emitters of transistors 4.1-4 have a voltage level of 0.8-1.0 V ( The sum of the emitter voltages is the base of the saturated transistor 401 0.7 V and the collector - emitter of the saturated transistor 301 (0.1-0.3 V). Thus, the multistable trigger switches from the original to the first state.

Suppose the multistable trigger is in the first steady state and a positive impulse arrives at the input bus 6, p. The resistor 2.p switches to the saturation mode. Due to the current of the first collector of the transistor 20p, the voltage level at the emitters of the transistors 4.1-4 .p decreases to 0.1-0.3 V, which leads to the closing of the transistor 4a1 and the avalanche-like turning off of the cell 1.1. On the output bus 7.1, a high voltage level is established. During the pulse action on the bus bp transistor 2, n saturates, and the multistable trigger is in the initial state, in which all cells are turned off. At the end of the pulse on the bus bp, the resorption process of the minority carriers in the base of transistor 2.p. In the field of the first collector, this process proceeds faster (similar to the situation

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described above), therefore the voltage at the emitters of transistors 4.1-4. P increases, then the transistor Z.p opens, because at the expense of the current of its base, the resorption of the carriers occurs in the region of the second collector of transistor 2.p. The collector current of the transistor Z.p opens the transistor Z.p. the voltage level on the bus 7, n decreases, the transistor 4 opens, n, and an avalanche-like process of switching on and saturation of the transistors Z.p and 4.p cells l.n. At the end of the process of resorption of carriers in the base of the transistor 2.n, the transistor 5, n is closed, and the cell 1, n remains in the on state,

Thus, the multistable trigger switches from the first stable state to the nth, and the switching takes place through an intermediate initial state, the duration of which is determined by the duration of the switching pulse, since the on-cell turns off on the front of the new cell. included in its slice.

If a positive pulse arrives on the reset bus 11, then the transistor 9 switches to the Nescene mode. Due to the current of its collector, the potential at the emitters of transistors 4.1–4. P decreases to a level of 0.1–0.3 V, which turns off any of the included cells by reducing to zero the current through the emitter junction of the transistor 4 of this cell. As a result, the multistable trigger switches to the initial state, in which all cells are turned off; After the pulse on the reset bus 11 is closed, the transistor 9 is closed, and the multistable trigger remains in the initial state (because no cell is turned on)

Thus, a multistable trigger has n 1 stable states, and switching from one state to another occurs through the initial state, which expands the scope of application of the proposed device, because simultaneous (even short duration) is excluded.

in the process of switching) the inclusion of two cells (t, e0 the presence of current in two loads at the same time), and the functionality

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to the fact that the duration of the intermediate stay in the initial state can be controlled by the duration of the switching pulses, in the initial (or intermediate initial) state the device consumes almost no energy, except for the current through a sufficiently high resistor 10 in the intermediate initial state (to clarify that in the initial state all the transistors of all cells and the transistor 9 are closed and the current through the resistor 10 is absent, and in the intermediate initial state one of the transistors is 2.1–2 and 9 is open and current flows through the resistor 10, the output signals of tire on both 7.1-7.P state equivalent to four).

Simplification of the integrated fabrication technology of the proposed device is achieved due to the fact that it does not contain any other elements other than np-p- and pp-p-transistors (in the integrated version, it is possible to implement the device on the basis of vertical structures transistors and horizontal structures of pnp transistors with insulating reverse-biased pn-junctions, while the implementation of two-collector npp transistors is possible by connecting the bases and emitters of two nppn transistors in isolated pockets ,

Claims (1)

Invention Formula A multistable trigger containing p of the same type cells, each of which is made on the first transistor of the first conductivity type and the second transistor of the second conductivity type, the emitter of the first transistor is connected to a common bus, its base and collector are connected respectively to the collector and the base of the second transistor, which is connected to the output pin and through the load resistor is connected to the power bus, common to all cells is a switching transistor, the emitter of which is connected to the common bus, the base is connected to the reset bus, the collector p is connected to the emitters of the second transistors of all the cells and through a common resistor to the power bus, characterized in that, in order to simplify the implementation of the integrated design and expand the scope, the third transistor of the first type of conductivity and the fourth transistor of the second conduction type whose emitter and collector are connected to the emitter and collector respectively the second transistor, the base is connected to the second collector of the third transistor, the emitter of which is connected to the common bus, the base is connected to the input bus of the cell, and the first collector is connected to the collector of the switching transistor. Compiled by A. Yanov Editor M. Petrov Tehred A. Kravchuk Order 464 Circulation 660 RCIIPI State Committee for Inventions and Discoveries at the State Committee for Science and Technology of the USSR 4/5, Moscow, Zh-35, Raushsk nab. 113035 12 jp i. 7./Z I I L Proofreader S. Shekmar Subscription