SU1552186A2 - Device for monitoring program run - Google Patents

Abstract

The invention relates to computing, can be used to control the progress of programs in multiprocessor and multiprogramming computing systems and is an improvement of the invention in a. N 894713. The aim of the invention is to increase the speed of the device for monitoring the progress of programs. For this purpose, a counter is entered into the device, the overflow of which indicates an unacceptable duration of the program. In addition, an OR element, two AND elements, an NOT element, and a decoder are introduced into the device. The device provides for the selection of interrupts from system programs and the suspension of the process of modifying the counter of the remaining time of the user program for the duration of the system programs. 1 il.

Description

The invention relates to computing, can be used to create control devices for multiprocessor and multiprogramming computing systems and is an improvement of the device according to aut. No. 894713.

The purpose of the invention is to increase the speed of the device by selecting interrupts from system programs and stopping the modification of the remaining user program execution time for the duration of the system programs.

The drawing shows the functional diagram of the device.

The device contains the first counter 1, the summing input of which is connected to the output of the generator 2 pulses, and the overflow output is the control output 3 of the device, a group of K registers -4, an input group of blocks of 5 And elements, an output group of blocks of 6 And elements, the second counter 7, first 8 and second 9 decoders, block 10 elements OR, first 11 and second 12 elements OR, device reset input 13, device recovery input 14, maximum program execution time input 15, device interrupt input 16, third decoder 17, third account tchik 18, the third element OR 19, the element NOT 20, the elements And 21 and 22. The device operates as follows.

At the beginning of the operation, an input is given to the input 13 of the device, which nullifies

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the contents of the third counter 18.

At each program execution, the counter 1 is programmatically entered through the information inputs 15 of the device and a block of 10 elements OR the additional code of the maximum program execution time. During the execution of the program, the summing input of the counter 1 receives pulses from the generator 2 of the time stamp pulses. If the program execution time exceeds the maximum allowable, then counter 1 generates an overflow signal, which through control output 3 of the device enters the computer system interrupt system. During normal program run, counter 1 does not overflow

However, even during the normal course of a program in multiprogram mode of operation, interruptions of this program are possible due to the need to execute user programs with a higher priority or system interrupt handling programs from computing system devices.

In the first case, it becomes necessary to memorize and restore the remaining execution time of the interrupted programs so that the counter 1 can add the additional code of the maximum execution time of the interrupting program and be able to continue the execution of the interrupted program later.

In the second case only

suspend modification process

and the contents of counter 1 for a period of

bots system program.

The interrupt signals are received through the second information input 16 of the device to the third decoder 17. The control signals appear at the first output of the decoder 17 when the interrupt signals from user programs with higher priority arrive at the decoder, and at the second output when interrupt signals from the system interrupt handling programs from computing system devices

The signals from the first output of the decoder 17 are fed to the clock input of the decoder 8. The inputs of the first 8 and second 9 decoders are connected to the outputs of the second counter 7, the number of interrupts from custom pro0

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gram. When the first interrupt signal is received from the user program, a single signal is generated at the first output of the decoder 8, which is fed to the control inputs of the first input block of the group 5 And elements and receives the code from counter 1 to the first register 4 of the group. At the same time, the signal from the first output of the decoder 8 through the first element OR 11 enters the summing input of the counter 7 and increases its content by one. As a result, when a second interrupt signal is received from the user program, a single signal is generated at the second output of the decoder 8, which records the contents of counter 1 into the second register 4 of the group. After that, the user program of a higher priority starts to run, and the additional code of the maximum allowable program execution time is again entered into the counter 1 through the inputs 15 of the device and the block 10 of the elements OR. Upon receipt of subsequent interrupt signals from user programs, the operation of the device circuit is similar to that described above.

When the Kth interrupt signal is received from the user program, the contents of counter 1 are rewritten into the Kth register 4 of the group.

When the interrupt signal from the system program arrives at the device input 16, the control signal appears at the second output of the decoder 17. This signal arrives at the summing input of the counter 18 and increases its content by one. Thus, the counter 18 contains the depth of the system program interrupts. In addition, the signal from the second output of the decoder 17 is fed to the stopping input of generator 2. The generator 2 stops, thereby stopping the process of modifying the contents of counter 1. When the device 16 arrives at the input 16 of the device programs the device works in a similar way. It should be borne in mind that the priorities of the system programs are different, but the priority of any system program for handling interrupts from devices is always higher than the priority of any user program.

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When returning to the processing of prerany user programs, the device works as follows.

The signals for recovery from user and system programs are available on the fourth control course 14 of the device. If the contents of the 18 is not zero, then the zero signal from the zero output of counter 18 goes to the element OR 19, the second input of the AND 22 element and through the element NOT 20 to the second input of the And 22 element. The restore signal 1S from the input 14 receives only on the subtracting input of the counter 18. This reduces the content of the counter 18 by one. If, as a result of the modification, the contents of the counter become zero, then a single signal from the zero output of counter 18 through the element OR 19 starts generator 2, and also enters through the element HE 20 to the second input 25 of the element 21 and the second input of the element 22. The next recovery signal is fed to the first input of the AND 21 element, from the output of the AND 21 element to the clock input of the decoder 9. A single signal is generated at the output of the decoder 9 in accordance with the contents of counter 7. So, if the last record of the contents of counter 1 was implied is connected to the 4th group K register, then when the first recovery signal 5 arrives, a single signal is generated at the K output of the second decoder 9, which goes to the control inputs of the Kth output block 6 of the AND group and overwrites the contents of K- th register in the counter 1.

At the same time, the same signal through the element OR 12 is fed to the subtracting input of counter 7, reducing its content by one. As a result, when the second recovery signal is received through the control input 14 of the device, a single signal is generated at the (K-1) th output of the decoder 9, is fed to the control inputs of the (K-1) th output block of 6 elements And group and There is a census of the contents of the (K-1) th register of group 4 into counter 1. At the same time, the same signal through the second element OR 12 is fed to the subtractive input

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second counter 7, reducing its content by one.

Similarly, a return to the processing of other user programs with lower priority is carried out. The proposed device provides for the selection of interrupts from system interrupt handling programs coming from the computing system devices, and suspending the modification of the counter of the remaining execution time of the programs instead of practicing the full cycle of storing and restoring the remaining execution time code that runs when the interrupts from user programs with higher priority are processed, which increases the speed of the computing system equipped with a device for controlling the course of programs.

Claims (1)

Invention Formula Device to control the progress of programs on av.sv. No. 894713, due to the fact that, in order to increase the speed of the device, a third decoder, a third counter, a third OR element, the first and second AND elements, the NOT element are entered, the input of the third decoder is the first output of the third decoder is connected to the first input of the third OR element and to the clock input of the first decoder, the second output of the third decoder is connected to the summing input of the third counter and to the lock input of the pulse generator, subtracting the input of the third The counter is connected to the output of the first element AND, the reset input of the third counter is the device reset input, the zero output of the third counter is connected to the first input of the second element AND and the second input of the third OR element, the output of the third OR element is connected to the trigger input of the pulse generator, zero output The third counter is NOT connected to the first input of the first element I through the element, the second inputs of the first and second elements I are connected to the input of the sign of the device program recovery, the output of the second element And connected to the clock input of the second decoder. sixteen