SU1545325A1 - Phase shifter - Google Patents

Abstract

The invention relates to radio engineering and can be used in devices of the formation of a rectangular voltage, the phase of which is regulated relative to the initial one by changing the input control signal. The aim of the invention is to increase the stability of the phase shift and the linearity of the adjustment. The phase shifter contains a capacitor 1, the first integrator 2, the first inverting amplifier 3, the first 4 and second 5 comparators, the first 6 and the second 7 differentiating circuits, the RS flip-flop 8, the 9-level converter, the synchronous amplifier 10, the second integrator 11. The first output of the capacitor 1 connected to the synchronization input of the synchronous amplifier 10 and is the input of the phase shifter. The second output of the capacitor 1 is connected to the input of the first integrator 2, the output of which is connected to the second input of the first comparator 4 and the input of the first inverting amplifier 3, the output of which is connected to the second input of the second comparator 5. The output of the first comparator 4 is connected to S- the input of the RS flip-flop 8. The output of the second comparator 5 through the second differentiating circuit 7 is connected to the R-input of the RS-flip-flop 8, the non-inverting output of which is connected to the output of the phase shifter. The input of level 9 converter is connected to the inverting output of RS flip-flop 8, and the output is connected to the input of synchronous amplifier 10, the output of which is connected to the first input of the second integrator 11, the second input of which is connected to the input of the phase rotator control. The output of the second integrator 11 is connected to the first inputs of the comparators 4 and 5. 2 Il.

Description

The invention relates to radio engineering and can be used in devices of the formation of a rectangular voltage, the phase of which is regulated relative to the initial one by changing the input control signal.

The purpose of the invention is to increase the stability of the phase shift and the linearity of the adjustment.

FIG. 1 is a functional diagram of a phase shifter j in FIG. 2 - work diagrams.

The phase shifter contains a capacitor 1, the first integrator 2, the first inverting amplifier 3, the first 4 and second 5 comparators, the first 6 and second 7 differentiating circuits, the RS trigger 8, the transducer 9 level, the synchronous amplifier 10, the second integrator 11.

Phaser works as follows.

The input of the phase shifter is a signal having the shape of a meander (Fig. 2, a signal having the shape of a meander (Fig. 2b), which enters the input of the first integrator 2, at the output of which a sawtooth voltage is formed (Fig. 2c). Then the signal arrives to the second input of the first comparator 4 and the input of the first inverting amplifier 3, the output of which is sawtooth voltage (Fig. 2d), having a phase shift relative to the input signal by 180 °. This signal is fed to the second input of the second comparator 5. The first inputs of the first 4 and second 5 The ommparators receive the output voltage USMK from the output of the second integrator 11. When the sawtooth voltage exceeds the voltage U8llx, the output of the first 4 and second 5 compressors produces pulses (chip 2e, f), the leading edges of which are differentiated by the first 6 and the second 7 differentiating circuits, respectively, whereby the pulses from the output of the differentiating circuits RS-flip-flop 8 are set to the state of a logical unit, then to the state of logical zero. At the output of the RS flip-flop 8, a signal is generated in the form of a meander (Fig. 2g), having a phase shift of 0-180 ° with a change in U 8t | V, within the amplitude of the sawtooth voltage. Moreover, the sign Ugk | 1 (may

Q

5 o

5 Q,

five

be both positive and negative.

The signal from the inverting output of the RS flip-flop 8 is fed to the input of the pret generator 9 level, the output of which produces a two-pole signal (Fig. 2h), which is fed to the input of the synchronous amplifier 10, the synchronization input of which is connected to the input of the phase shifter. In this case, the signal at the output of the synchronous amplifier 10 has the form shown in FIG. 2k. In the presence of a synchronization signal, the gain of the synchronous amplifier is +1, and in its absence, -1. In steady state, the average currents flowing through the input resistors of the second integrator 11 are equal in magnitude and opposite in sign. The time constant of the second integrator 11 is an order of magnitude longer than the time constant of the first integrator 2. This ensures small ripple of the output voltage (UBWJr) of the second integrator 11. The output voltage of the second integrator 11 is used as a reference level and is fed to the first inputs of the first 4 and 5 second comparators.

The stabilization of the phase shift and the linearity of the phase shifter control is due to the negative feedback between the inverting output of the RS flip-flop 8 and the first inputs of the comparators.

The magnitude of the phase shift is determined by the expression

| (one

R, U R, U

-)

where Rf and R.J are the values of the input resistors of the first and second inputs of the second integrator 1 1 vg y over the input control

signal phase shifter, U - signal amplitude on

output of the synchronous amplifier 10.

Claims (1)

Invention Formula A phase shifter containing the first and second integrators, an RS-grigger whose non-invertirutadium input is connected to the output of the phase shifter, the first (inverting) and the second amplifiers, the first and second comparators, the first inputs of which are interconnected, the first and second differential circuits, the output of the first comparator through the first differentiation circuit is connected to the S input of the RS flip-flop, the output of the second comparator via the second differentiation circuit connected to the R input of the RS flip-flop, the output of the first integrator through the first (inverting) amplifier is connected to the second input of the second comparator, characterized in that, in order to increase the stability of the phase shift and the linearity of the regulation, the second amplifier is synchronous m, the second integrator - dvuhvhodoly, introduced konden№ Sator, perg vn.chod koitshgo connected to the input fayoovrashat. h, reboot - - the level detector, the output of which is connected to the input of the synchronous yet shtele, and the input - with the inverse output. trigger, ghronizash-i input of a synchronous amplifier is connected to the first port of the condenser, whose rubbing output is connected to the input of the first integrator, the output of which is connected to the second input of the first comparator, the output of the synchronous amplifier is connected to the first input of the second integrator, and the second input is connected to the control input of flarovr the atel, and the output of the second integrator is connected to the first inputs of the mixters.