SU151119A1 - Sampling device commands from long-term storage device - Google Patents

Description

The known devices for retrieving information (commands), consisting of ferrite matrices and two ring counters, fetch commands from the RAM, for which they use the coincidence of currents along the X and Y coordinates.

In the described device, which contains a ferrite matrix and g | 1 "kaditsi tsi eMpftiiiKB-, the sample is compiled by writing and then reading, which makes it possible to create reliable and cost-effective systems for sampling companies from a long-term storage device in specialized digital computers. .

This is achieved by the fact that, in the device, the outputs of one short-circuit Ring Counters are connected to the write buses O (dio1) in all the columns of the matrix, the outputs of the second counter are connected to the corresponding read buses of information from each column, and the output of the last bit of the second counter first.

The drawing shows a functional diagram of the device.

The circuit includes: a command counter made of two ring counters / 2 with write and read 4 formers 4, a matrix of 5 commands from ferrites 6 with a rectangular hysteresis loop, read amplifiers 7 and local control 5.

The device performs the following functions.

Counting the number of executed commands, fetching the address of commands in the device, storing commands, fetching the command code at the command address and issuing them to the decoder of operations and addresses of memory devices of numbers of coefficients.

In the above scheme, ring counters are built on ferritotransistor cells. The counting is performed by shifting the unit in ring meters on a push-pull system. The input pulses for the first digit 151119-2 are the second digit of counter 2, which are to be recalculated, and the operation completion signals that produce units from the counter. The carry (overflow) signal from the high-order bit of counter 2 enters the n-offset of the counter unit / and overwrites the iiepBi iii bit of counter 2.

Such a system of reference for the presence of a matrix 5 of memorizing elements makes it easy to decipher the command address when building a command counter on the number of pulsed (dynamic) elements — fern-transistor cells, while arriving at D | JCTHO decoder with pulse elements is difficult.

In order to ensure the possibility of deciphering the code of operations and addresses on the diode-trlformator matrices, each codeosis is represented as a two-digit position code with a base "/. Command address decryption occurs as follows.

When the unit is shifted in the counter / output pulse of cell 9, a powerful recording driver 3 is started, the output HNJ pulse of which enters the write chain C, penetrating four ferrites (blackened in the drawing) in each column of the matrix 5. The matrix is typed. that the number of ferrites in each column is equal to the sum of the number of bits of the two-bit operation codes 10 and address 11. And the number of columns is equal to the number of bits of the counter 2. The recording bus runs through each column two ferrites, corresponding to the operation code / O, and two ferrites, acc The address code / V numbers and coefficients, and as the current pulse passes through it, units are written to them. Thus, during the recording, it is as if the operation codes and the address in each column are set. Selection of the command code at the address occurs when the unit moves along the counter 2.

At the same time, the output pulse from each bit of the counter CH 2 and the shaper 4 is fed to the read bus g of the corresponding ferrite column 6, reversing the four ferrites corresponding to the address codes and operations. Ferrites located in one row of the matrix are stitched with a common output winding W. Each such winding corresponds to a certain bit in the operation code or address code. (Therefore, at each shift of counter 2 on four output windings, signals arriving at the amplifiers 7 are counted. From the output of the amplifiers of reading, the selected address codes and operations go to diode transformer decoders of operations and addresses (not shown). so that, as a result of the summing of noise in the output windings No. when recording commands, reading amplifiers do not occur, they are executed with the introduction of a gating cascade. The number of commands that can be played with such c are determined by the product of the bits of the first and second ring counters.

The increase in the reliability of the device is achieved by the fact that the outputs 12 of the ring counter 2 are connected to the write buses W at the same time in all columns of the matrix 5, the outputs J3 of the ring counter 2 are connected to the read buses of information From each column, and the output And the last bit of the ring counter 2 is connected to shear tires / 5 ring meter /.

Device A selection of commands from long-term storage in specialized digital computers.

Subject invention

consisting of a ferrnt matrix and two ring counters, characterized in that, in order to increase the reliability and simplification of the device, in it the outputs of one of the ring counters are connected to the recording titles simultaneously in all columns of the matrix, the second outputs are connected to the corresponding readout buses from each column, and the output of the last bit of the second counter is connected to the shears of the first one.