SU1510084A1 - Redundantized a-d converter - Google Patents

Abstract

The invention relates to automation and computing and can be used in the construction of highly reliable control systems, systems for collecting and processing information. The purpose of the invention is to increase reliability. This is achieved by the fact that differential amplifiers 10, 13, threshold comparators 11, 14, element 12 are entered into the device containing analog-digital converters 1, 6 of sequential approximation, block 5 of the output code generation. f-ly, 2 ill.

Description

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The invention relates to automation and computing and can be used in the construction of highly reliable redundant control systems, information collection and processing systems.

The aim of the invention is to increase reliability.

FIG. 1 is a functional diagram of the device proposed; in fig. 2 - functional block diagram of the formation of the output code.

The device contains an analog-to-digital converter (ADC) 1 of sequential approximation, containing a digital-to-analog converter (DAC) 2, comparator 3, register k of sequential approximation, output code generation unit 5, ADC 6 of sequential approximation containing a digital converter 7, comparator 8, register 9 successive approximation; differential amplifier 10; threshold comparator 11; element 12; differential amplifier 13; threshold comparator 1.

The output code generation unit 5 (FIG. 2) consists of. elements AND 15, elements OR 1b, inverter 17. and passes to its output information from one of the currently working ADC 1 or 6.

Comparators 11 and 14 are threshold. A log appears on their outputs. 1, if the input voltage falls outside their upper and lower thresholds.

The device works as follows.

The case is considered when all elements 1-17 of the reserved ADC are operable. An analog signal is applied to the input bus. ADC 1 and 6 simultaneously begin the process. convert analog value to digital code. At the end of the conversion, the signals at the outputs of the DACs 2 and 7 differ by an amount not exceeding the double error of the ADC, expressed in analog form. The signals at the outputs of the differential amplifiers 10 and 13 do not go beyond the upper and lower thresholds of operation of the comparators 11 and 14. Signals 1 appear at their outputs, which leads to the appearance of the signal Log. About at the output of the element And 12,

which permits the passage through elements 15 and 1b of the code signal from the output of ADC 1 to the output of block 5, and prohibits the passage of the signal from the ADC 6, thus the output signal of the back-up ADC receives a code signal from a working ADC 1.

The situation is considered when a failure occurs in one of the ADCs, for example, ADC 1. Failure of any of the elements 2-k will lead to a mismatch of the signals at the output of the D / A converter 2 and the signals at the output of the D / A converter 7 and the input signal. As a result, the output signals of amplifiers 10 and 13 will go beyond the thresholds of the comparators 11 and 14, and a Log signal will appear at their outputs. 1. This will result in the appearance of the Log signal. 1 at the output of the element And 12, which will allow the passage to the output of block 5 of the code signal from a healthy ADC 6 and prohibit the passage of a signal from an inoperative ADC 1.

If a failure occurs in one of the elements of the ADC 6, then the output signal of the amplifier 10 will go beyond the thresholds of the comparator 11 and the Log signal will be output to its output. 1. At the output of the comparator 14 there is a signal Log. Oh, what leads to the appearance of the Log signal. About the output element And 12, which permits the passage to the output of block 5 of the code signal from a healthy ADC 1 and prohibits the passage of a signal from an inoperative ADC 6.

Claims (3)

1. A redundant analog-to-digital converter containing first and second analog-to-digital converters of sequential approximation, made identically, the first input of the first of which is an input bus, and the outputs of analog-digital converters of sequential approximation are connected to the corresponding first and second information inputs of the forming unit output code, the outputs of which are the output bus, characterized in that, in order to increase reliability, the element I is entered into it, two threshold comparator, two differential amplifiers, the first inputs of which are combined with the second input of the first analog-digital converter of the serial approximation, the second input of the first differential amplifier is connected to the first input of the second analog-digital converter of the serial approximation, the second input of the second differential amplifier is an input bus and is combined with the second input of the second analog-to-digital converter of the successive approximation, the outputs of the first and second differential amplifiers through the first and second threshold comparators are connected respectively to the first and second inputs of the element I, the output of which is connected to the control input of the forming unit; single code. 2. The converter according to claim 1, characterized in that the block forming the output code is made of two groups of n elements And each, on n elements OR, where n is the number of bits of the converter, and the inverter, whose input is combined to 510084 with the first inputs of the elements of the first group and is the control input of the block, the output of the inverter is connected to the first inputs of the elements of the second group, the second inputs of the elements of the first and second groups are the corresponding first and second information inputs of the block, the outputs of the ix elements of the first and The second groups are connected respectively to the first and second inputs of the i-ro element OR, the outputs of the OR elements are the outputs of the block. 3. The converter according to claim 1, wherein the first analog-to-digital converter of the sequential approximation is performed on a digital-to-analog converter, a serial-approximation register and a comparator, the first input of which is the first input of the block, the second input is connected to the output of the digital-analog converter and is the second input of the block, the output of the comparator is connected to the input of the sequential approximation register, the outputs of which are connected to the corresponding inputs of the digital-to-analog converter and are output15 20 25 thirty mi block. ъ s one