SU1509832A1 - Module for program control of electric drive - Google Patents

Abstract

The invention relates to automation and computer technology and can be used in software systems for controlling electric drives. The purpose of the invention is to expand the functionality by providing a real-time mode of change in the magnitude of the maximum speed of the electric drive during the processing of a given movement. The module for software control of the electric drive contains a generator of 1 pulses, controlled dividers of 2.3 frequencies, drivers 9.18, trigger 13, elements AND 11, 12, 19-22, elements NOT 23, OR 14, blocks 8.17 comparisons, averager 24, reversing counter 5 pulses, displacement counter 7 and acceleration 6, switch 10, registers of reference 4, maximum 15 and minimum speed 16. The registers, movement counter and driver 9 are connected to the data line. The invention provides the possibility of repeated changes during working out of a given movement of the maximum speed of the electric drive with automatic determination of the acceleration and deceleration area. 3 il.

Description

The invention relates to automation and computer technology and can be used in software systems for controlling electric drives, for example, in coordinate tables, plotters, automatic programmable machines, industrial robots, control systems for flexible production modules.

The purpose of the invention is to expand the functionality by providing a real-time change mode of magnitude.

Controlled divider 3 frequencies, as well as the values of the control coordinate signals + and - - for switch 10 and the sign of starting the module to perform acceleration after entering data into the module registers, movement counter 7 and the first driver 9.

A reversible pulse counter 5 is used to sum the acceleration and deceleration pulses during acceleration and subtraction during deceleration, and its output group determines the coefficient

the maximum speed of movement of the elec- tive; 15, the dividing power of the first control of the electric drive during the working out of a specified movement.

Fig, 1 shows a block diagram of the device; Fig. 2 is a graph of testing a given movement without changing the maximum speed of movement of the electric drive during the processing of movement; Fig. 3 is a graph of the development of a given movement with changes in the maximum movement speed of the electric drive during the processing of movement.

The module (FIG. 1) contains a pulse generator 1, a first 2 and a second 3 controlled frequency dividers, a setting register A, a reversing pulse counter 5, an acceleration counter 6, a displacement counter 7, a first comparison unit 8, a first driver 9, a switch 10, first 11 and second 12 elements And, trigger 13, element of RShI 14, maximum speed register 15, register 16 speed, second comparison block 17, second driver 18, fourth 19, third 20, five or six and 2.2 six elements And, element NOT 23, averaged. Tel 24,

The pulse generator 1 generates a constant frequency, its first output being the reference frequency output which is converted by the first controlled frequency divider 2 into the output frequency of the module, and the second output of the pulse generator 1 is outputted by the acceleration-deceleration frequency output the second controlled divider 3 frequencies into the frequency of the counting of the reversible counter 5 pulses,

Register 4 of the task is intended for storing and storing the code of the acceleration-deceleration acceleration value, which determines the division ratio of the second

five

A second frequency divider 2 is also supplied to the second group of inputs of the second comparison unit 17.

Acceleration counter 6 counts acceleration pulses when accelerating or when speed increases — acceleration from moving from a certain constant speed f / lax, with which

the movement to the new, and Vj d, was carried out by summing the pulses and subtracting when braking or decreasing the speed — slowing down, when the speed changes to

0 ,,. C v, “,,.

Movement counter 7 subtracts each output frequency pulse from the magnitude of the specified displacement, and its zero output indicates the completion of the testing of the specified Alternation,

The first comparison unit 8 is used to determine the start of braking from the current speed to the minimum, as well as fixing the entire braking period. The moment of the start of deceleration is determined by the equality of the codes at the outputs of the displacement counter 7 and the reverse acceleration counter b.

The first driver 9 is intended to form pulses with predetermined parameters, for example, duration.

Switch 10, depending on the values of the control inputs, pulses the output frequency to one of the coordinate outputs + or

The first 11 and second 12 elements And allow the counting of the reversible counter of 5 pulses, and during acceleration or transition to a higher speed of movement, the electric drive is open for the passage of pulses to the summing

0

five

0

five

the input is the first element And 11, and when braking or moving to a lower speed movement is open for passing the impulses to the subtracting input the second element And 12.

The trigger 13 provides for the module to start up by generating a permitting potential arriving at the third 20 and fourth 19 AND elements and allowing pulses from the pulse generator 1 to flow to the clock inputs of the first 2 and second 3 controlled frequency dividers.

The OR 14 element combines the signals for the start of deceleration from the output of the first comparison unit 8 and the output signal Less than the second comparison unit 17, indicating the need to reduce the speed of the electric drive to the value entered in the maximum speed register 15. The maximum speed register 15 is intended to store a code value corresponding to a predetermined maximum speed of the electric drive. In the process of testing a given movement, the value of the maximum speed may change an arbitrary number of times.

The minimum speed register 16 stores the code value corresponding to the minimum movement speed, and also transmits this value to a group of information inputs of the reversible counter of 5 pulses.

The second comparison block 17 provides the determination of the acceleration period to the required maximum speed of the sub-run period from the previously set maximum speed to a higher value of the maximum speed recorded by the data highway in the maximum speed register 15 during the process of working the specified movement, as well as determining the braking period from the previously set maximum speed to a lower value of the maximum speed, which is entered in the register 15 of the maximum speed in the process of working out a given transfer beshcheni. The determination of the first two periods is carried out by generating a signal at the output More, and the third period at the output Less than the second comparison block 17.

five

0

five

0

five

0

five

0

five

The second driver 18 produces a short pulse when a unit is set at the third output of the register 4 of the task. This impulse ensures the installation of the trigger 13 in a single state, as well as overwriting the code value corresponding to the minimum speed in a reversible counter of 5 pulses.

Fifth 21 and sixth 22 elements And provide the passage of pulses from the output of the averager 24 to the subtracting and summing inputs of the reversing counter 6 acceleration, and during acceleration or subtraking, the pulses pass through the sixth element And 22, and during braking or slowing down - through the fifth element and 21.

 Inverter 23 blocks the passage of pulses through the first 11 and sixth 22 elements AND while braking.

The averager 24 is designed to equalize the period of the pulse following from the output of the first controlled divider 2 frequency.

The module works as follows.

Before the beginning of the cycle for testing the movement, the trigger 13 is reset and the pulses from the generator 1 of the pulses do not (go to the first 2 and second 3 controlled dividers.

At the beginning of the cycle, the minimum speed rate code is entered into the minimum speed register from the data line, the maximum speed rate value code is entered into the maximum speed register 15, the first pulse generator 9 is the pulse duration code, and the movement counter 7 is the value code of the required motion, Register 4 of the task (Fig. 2) - code of the acceleration-deceleration acceleration value, the value of the control inputs of the multiplexer 10 depending on the required direction of movement, the sign of the Work coming and the third register specifying output 4 and is yuschiys starting modulation signal.

The feature Job starts the second driver 18, which is used to form a short pulse allowing the minimum speed code to be overwritten from the register 16 mi-

1shmal speed in the reversible counter 5 pulses and set-U1G1iy trigger 13 in one state. From the output of the trigger 13, the resolving potential is fed to the second inputs of the third 20 and fourth 19 elements AND and the pulses from the pulse generator 1, which arrive at the first inputs of the third 20 and fourth 19 elements AND, pass to the clock inputs of the first 2 and second 3 controlled dividers frequencies. The reference frequency Fg is fed to the input of the first controlled splitter 2 frequency

(the maximum possible frequency at the output of the module for controlling the drive). To the input of the second controlled divider 3 frequencies comes the reference frequency F, (the maximum acceleration frequency of the drive is possible). The frequency of the pulses at the outputs of the controlled frequency dividers is determined by the division factor — the code arriving at their control inputs. The frequency of the pulses at the output of the second controlled splitter 3 frequency is determined by the formula

l f and

2) where n is the code corresponding to the specified acceleration of acceleration deceleration, coming from the register 4 tasks to the control inputs of the second divider 3 frequency; k is the divider size. Pulses with a constant frequency F, corresponding to a given acceleration, are fed to the first inputs of the first 11 and second 12 elements I. The code value at the discharge outputs of the reversible counter 5 pulses (goes to the control inputs of the first controlled splitter 2 frequency and on the second a group of inputs of the second comparison block 17, on the first group of inputs of which a code is received from the register 15 of the maximum speed.

If the value of the code received from the reversible counter 5 pulses is less than the value of the maximum speed code received from the maximum speed register 15 (this is the situation that occurs when acceleration starts), then the second comparison block 17 produces a single

ten

098328

output signal More. This signal permits the passage of pulses from the output of the second controlled divider 3 frequency, on the summations the input of the reversible counter 5 pulses through the first element 11 and also permits the passage of pulses from the output of the average 24 to the summing input of the reversible counter 6 acceleration through the sixth element And 22. Pulses pass to the summing inputs, if their passage is not blocked by supplying the blocking potential from the output of the inverter 23 to the third inputs of the first 11 and sixth 22 I elements.

Overwriting into the reversible counter 5 pulses the minimum speed code value and the arrival of pulses at the clock input of the first controlled splitter 2 frequency leads to the formation of the last pulse at the output frequency

15

20

F -

proportional to the code of the number N on the control inputs of this frequency divider, coming from the reversible counter 5 pulses. At the output of the averager 24 pulses are formed

out

0

five

0

five

where Nutrp is the averaging coefficient.

The pulses trigger the first driver 9, which generates pulses of the required duration, and through the switch 10 enters the output of the module.

Pulses arriving at the summing input with a frequency F increase the code at the outputs of the reversible counter 5 pulses, and hence the frequency F at the output of the first controlled splitter 2 frequency. Simultaneously, the reversing counter 6 acceleration performs counting (by summation) of pulses from the output of the averager 24, performed during the acceleration period.

The increase in the code in the reversible counter of 5 pulses, and consequently, the increase in the frequency F at the end of the first controlled splitter 2 frequency, as well as the frequency at the output of the module, is carried out

until the value of the code at the output of the reversible counter of 5 pulses and the value of the maximum speed code stored in the maximum speed register 15, in this case, the output of the More than second comparison block 17 produces a signal that blocks the passage of pulses through the first 11 and sixth 22 elements AND i.e. The acceleration of the electric drive is completed (Fig. 2) and the transition to the motion is performed at a constant speed determined by the code in the maximum speed register 15.

Each of the pulses generated by the averager 24 is fed to the subtracting input of the displacement counter 7, with the result that the contents of the displacement counter 7 are reduced by one for each of the generated pulses. The motion, with a constant speed, continues until the codes at the outputs of the movement counter 7 and the reverse acceleration counter b are matched. In this case, the first comparison unit 8 generates a resolving potential, the arrival of which at the OR 14 element ensures the passage of pulses with a frequency from the output of the first controlled divider 3 frequencies through the second element AND 12 to the subtracting input of the reversible counter 5 pulses, as well as the passage of pulses from the output the average 24. through the fifth element And 21 on the subtracting input of the reversing counter 6 acceleration. Began testing the braking of the drive to the minimum speed. The N code at the outputs of the reversible counter of the 6 pulses decreases, consequently, the frequency F at the output of the first controlled splitter 2 frequency decreases, and hence the frequency at the output of the module. The code N is reduced to a value equal to the value stored in the minimum speed register 16. The braking is carried out with the same acceleration as acceleration (i.e., 1 stor rag. (Fig. 2). The braking is performed until the displacement counter 7 1 is reset, the signal from the zero output of which resets the reversing counter 6 Acceleration, resetting the trigger .13 and generates a signal End of work in the data line about the end of the test run.

0

five

0

five

0

five

0

Resetting the flip-flop 13 leads to blocking the passage of the impu; the frequency FP and F, from the first and second outputs of the generator 1 pulses through the third 20 and fourth 19 elements I. At this, the acceleration-movement cycle with constant speed — deceleration (FIG. 2, curve 1) ends.

The module provides the testing of the movement and without exit to the maximum speed (Fig. 2, curve 2). In this case, the acceleration is performed as described above, but when the code B value of the movement counter 7 becomes equal to or less than the value of the number of acceleration pulses found in the reverse acceleration counter 6, the first comparison unit 8 through the inverter 23 blocks the continuation of the acceleration, i.e. the arrival of pulses on. the summing inputs of the reversible counters 3 and 6, and through the element OR 14 starts the passage of pulses to the subtractive inputs of the reversible counters 5 and 6, i.e. switches the module to the deceleration run mode. The end of the cycle acceleration - deceleration (Fig. 2, curve 2) is performed similarly to the end of the cycle; acceleration - movement at a constant speed - deceleration.

If in the course of working out the moves, it is necessary to change the value of the max-maximum speed (for example, points a, 8, S, 2, in FIG. 3), the module provides automatic acceleration to the new speed (MOtKC

 VMOKO where is the previous value of maximum speed, point with () or slowing down to new

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V speeds

COP fur

(V

X TT

max max

point B). The arrival of the new maximum speed from the data line to the maximum speed register 15 during the deceleration period of the run-in cycle does not affect the operation of the module and the module performs electric drive braking according to the algorithm described earlier. If the new value of the maximum speed arrives at the acceleration period, then the module processes the acceleration to the new value of the maximum speed, moving at a constant speed, braking according to the described operation algorithms.

If the new maximum speed is entered in the register. 15 maximum speed during the period of testing the movement with a constant speed, then, depending on the magnitude of the new maximum speed, the module makes a transition to a new speed by running or slowing down. The movement with a constant speed is characterized by the fact that in a reversible counter 5 pulses the code is stored the values of the old maximum speed, and in the reversing counter 6 acceleration - the code of the number of pulses issued by the module during acceleration, the passage of pulses to the summing and subtracting inputs is blocked The summation and subtraction of the reversible counter of 5 pulses and the reversible counter of acceleration 6, since the outputs are More and Less than the second comparison block 17 and the output of the first comparison block 18, have low logical signal levels.

If the new maximum speed entered in the maximum speed register 15 is greater than the old value, i.e. .c. Amax I lMQ o point a in FIG. 4), then the second comparison block 17 at the output More forms a high level potential that permits the passage of frequency pulses Fj from the output of the second controlled frequency divider 3 through the first element 11 to the totalized input of the reversible counter 5 pulses, as well as passing from the output of the averager 24 through the sixth element I 22 to the summing input of the reversing counter 6 acceleration. The value of the code in the reversible counter 5 pulses, and consequently, the frequency at the output of the module increases. At the same time, the value of the code of the number of pulses of acceleration in the reverse counter 6 of acceleration is increased. The increase in the codes, and hence the frequency at the output of the module, continues until the code at the output of the reversing counter of 5 pulses becomes equal to the code entered in the maximum speed register 15, in this case low potentials are formed on both outputs of the second comparison block 17 blocking 1e the passage of pulses into reversible counters 5 and 6, and the module begins to work out the movement

with new constant speed v ddoc

(F

1 "ax

If the new value of the maximum speed entered in the register 15. the maximum speed is less than the old value, i.e. UD „V ,,

(respectively, E ,, max "." point 5 in Fig. 4), then the second comparison block 17 at the Outlet forms a high-level potential, which through the OR 14 element allows the passage of pulses from the output of the second controlled divider 3 frequencies through the second And element 12 to the subtracting input of the reversible counter

5 pulses and the passage of pulses from the output of the averager 24 through the fifth element I 21 to subtract the input of the reversing counter 6 acceleration. The value of the code in the reverse counter

5 pulses, and therefore, and the frequency at the output of the module begin to decrease. At the same time, the value of the code for the number of acceleration pulses in the reversible counter 6 of acceleration is reduced, as it is slowed down to a lower speed. The reduction of the codes, which means that the frequency at the output of the module continues until the code at the output of the reversing counter 5 pulses is not equal to the code value entered in register 15 of the maximum speed. In this case, both potentials of the second comparison block 17 produce low potentials that block the passage of pulses to the reversible counters 5 and 6, and the module begins to work out the movement with a new constant speed V ddo, | (((F, g | (,). At points b and g (Fig. 1), the module operates similarly to the points a and мотрен considered in terms of changing the value of maximum speeds.

Thus, the introduction of new elements, blocks with their connections expands the functionality of the module for software control of the drive by providing a mode of change in real time

the magnitude of the maximum speed of movement of the actuator during the development of a given movement, which also allows the module to work with an interpolating device, by increasing or decreasing the speed of movement of the electric drive during the processing of movement of data transmitted by the interpolating device through the data highway to the maximum speed register.

Claims (1)

Invention Formula A module for software control of an electric drive, comprising a pulse generator, a trigger, first and second controlled frequency dividers, a job register, first and second drivers, first, second and third AND elements, an OR element, a reversing pulse counter, a minimum speed register, a displacement counter, the first unit of comparison, the overclocking counter, the switch, the clock input of which is connected to the output of the first driver, the group of control inputs of the switch is connected to the first group of outputs of the job register, the second group The output pins of which are connected to the group of control inputs of the second controlled frequency divider, the third output of the task register is connected to the input of the second driver, and the group of inputs of the task register is connected to the data highway, the first output of the pulse generator is connected to the first input of the third element I , the second input of which is connected to the trigger output, and the output to the clock input of the first controlled frequency divider, the group of control outputs of which is connected to a group of outputs of the reversible counter pulse c, the group of information inputs of the reversible pulse counter is connected to the group of outputs of the minimum speed register, and the control input is connected to the output of the second driver and the installation input to 1 trigger, the outputs of the first and second elements I are connected to the summing and subtracting input of the reverse pulse counter, respectively, the first inputs of the first and second elements AND are combined and connected to the output of the second controlled frequency divider, the second input of the second element AND is connected to the output of the element OR, the first input of which It is connected to the output of the first comparison unit, the first group of inputs of the first comparison unit is connected to the output group of the displacement counter, and the second. - with a group of outputs of the acceleration counter, while the zero output of the displacement counter is connected to the inputs of the installation in O of the trigger acceleration counter and to the bus End of work, and the groups of information inputs for the minimum speed register and the displacement counter are connected to the data highway, extending functionality by providing real-time mode changes in the magnitude of the maximum the speed of movement of the electric drive during the testing of a given movement, the acceleration counter is made in the form of a reverse, and the fourth, fifth and sixth elements AND, the element NOT, averager, the second comparison unit and the maximum speed register, whose output group is connected to the first group, are entered into it the inputs of the second comparison unit, the second group of inputs of the second comparison unit is connected to the output of the reversible pulse counter; the output More than the second comparison unit is connected to the second input by the first first input of the sixth And elements, and the output Less - with the second input of the SHS element, while the output of the first controlled frequency divider is connected to the input of the averager, whose output is connected to the clock input of the first driver, the subtracting input of the displacement counter, the first input of the fifth and the second input of the sixth element And, the second input of the fifth element AND is connected to the output of the element OR, the input of the element is NOT to the output of the first unit of comparison, and the output of the element is NOT connected to the third inputs of the first and sixth elements AND, the outputs of the fifth and sixth elements AND Inen with subtractive and summing inputs of the acceleration counter, respectively, the second output of the pulse generator is connected to the first input of the fourth. And, the second input of which is connected to the trigger output, and the output to the clock input of the second controlled frequency divider, the group of control inputs of the first formfl of the body and the group of information inputs of the maximum speed register are connected to the data highway. ntaffc / passA & l  jflote. P it pa Si. map. fts &. IS Compiled by A. Anikin Editor S. Pekar Tehred L. Serdyukova Proofreader S. Cherni Order 5809/43 Circulation 788 VNIIPI State Committee for Inventions and Discoveries at the State Committee on Science and Technology of the USSR 113035, Moscow, Zh-35, Raushsk nab., 4/5 five imopn. & l FIG. Subscription