SU1506565A1 - Device for receiving information transmitted via two parallel communication channels - Google Patents

Abstract

The invention relates to communication technology and can be used in data transmission systems. The purpose of the invention is to improve noise immunity. The device contains an adder 1 modulo two, two blocks 3 and 4 of increasing confidence, a logic block 5, two blocks 6 and 7 elements AND, a block OR 8 elements. In order to increase noise immunity, a JK-trigger 2 was introduced into the device. The principle of operation of the device is based on the use of information about previous states of both communication channels. The reports are received from the confidence-raising blocks in each channel and processed by a JK-trigger 2 and logic block 5, which then form a decision about which channel in the current time interval it is necessary to output information. 1 ill., 1 tab.

Description

The invention relates to communication technology and can be used in data transmission systems.

The purpose of the invention is to improve noise immunity.

The drawing shows the functional electrical circuit of the device.

The device contains an adder 1 modulo two-, 1K-flip-flop 2, the first and second blocks 3 and 4 increase the reliability, logic block 5, the first and second blocks of elements And 6 and 7 and the block of elements OR 8,

The principle of operation of this device is based on the use of information about previous states of both communication channels. Details are obtained from the confidence-building blocks in

each channel and process 1K-trigger 2 and logic block 5, which then form a decision about which channel in the current time interval you need to issue information.

The state of the 1K flip-flop 2 and the logic block. 5 defines the following possibilities for the combination of errors.

An unrecoverable error was detected in one and an error was not detected in another channel. A message is issued from the channel in which the error is not detected.

No errors were detected on both channels. A message is issued from the channel from which the message was sent at the previous time.

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Errors in one channel are correctable in one channel, irreparable in the other channel. A message is issued from the channel in which a correctable error is detected.

Correctable errors were detected in both channels: the message is retrieved from the channel, and the message was issued at the previous time.

A corrected error was detected in one channel, no error was detected in another channel. A message is issued from the channel where the error was not detected.

Unrecoverable errors found in both channels. A message is issued from the channel from which the message was issued at a previous point in time.

Compared with known devices, the proposed device reduces the likelihood of an error in the presence of a sixth combination of errors, which eliminates the need for a second question.

The device works as follows.

The signal from the first control outputs of the reliability increasing blocks 3 and A a is equal to 1 when any error is detected in them. In case of failure to detect the error, the signals a and a are equal to O. The signals from the second control outputs of the control blocks

reliability 3 and 4 a-, and

13 25

are equal

1 if an error is detected and corrected. In all other cases, the signals a, a. Are equal O. The signal Cp from the output of flip-flop 2 is equal to 1 if the last time error is recorded in the second channel.

Thus, the 1K-trigger 2 fixes the channel number in which an error was detected during the reception of the previous code combination in order to issue a current message from the channel in which the error was not detected earlier and now. Adder 1 prevents a change in the state of trigger 2 with the simultaneous absence of error detection in both channels, or in the case of simultaneous detection in

every channel error. Its state trigger 2 when an error is detected in only one channel. Trigger clocking is produced by pulses arriving at the device clock input.

five

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five

ABOUT

five

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five

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five

All signals that determine the state of the channels are fed to the inputs of logic block 5, which is a decoder that can be made on the basis of a permanent storage device (ROM). Reliability blocks 3 and 4 can also be made based on ROM.

The output signals b and b of logic block 5 control the unlocking of one of the blocks of elements 6, (or 7), passing the message of the corresponding channel through the block of elements 8 to the output of the device. Signals b, and b take a value of 1, in the case of unlocking the corresponding

block of elements And 6 (or 7),

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The algorithm of functioning of the logic circuit 5 and the entire device P1 is given in the table.

Thus, the proposed device provides greater noise immunity in the transmission of information without re-questioning.

Claims (1)

Invention Formula A device for receiving information transmitted over two parallel communication channels, containing a modulo-two adder, serially connected first confidence level block and first block of AND elements, OR block of elements, to the other inputs of which the outputs of the second reliability block are connected. And, the first and second control outputs of the first and second reliability modules are connected to the corresponding inputs of the logic unit, the first and second outputs of which are connected At first, the control inputs of the first and second blocks of the I elements are characterized in that, in order to increase the noise immunity, i a TK trigger is introduced, and the first control output of the first reliability module is connected to the first 1 input of the 1K trigger and the first input sug-1 modulo two, the first control output of the second reliability module is connected to the first K-input of the 1K-flip-flop and to the second input of the modulo-two adder, the output of which is connected to the combined second 1-and K-inputs of the 1K-flip-flop, 515065656 the output of which is connected to the corresponding clock input of the 1K-flip-flop is the move of the logic block, which is given by the clock input of the device. I 2g I 15 I g5 I I g Note g with a clock input device. OO0001 Lack of detected errors O10X0 1 Error corrected in 1O.1 X 1 About the channel detected 0О0X01 Unrecoverable error 1OO X1O detected in the channel Note. X is an arbitrary state.