SU1483601A1 - Differential amplifying stage - Google Patents

Abstract

The invention relates to radio engineering. The purpose of the invention is to increase speed. The differential amplifier stage contains transistors 1,2 and 3, collector loads 4, parallel RL-circuit 5 and resistor 6. The goal is achieved by compensating the parasitic capacitance in the emitter circuit of transistors 1 and 2 with the help of RL-circuit 5 and resistor 6. 2 Il.

Description

Fik.1

The invention relates to radio engineering and can be used in the output stages of amplifiers of sequences of nanosecond pulses of measuring and transmitting devices.

The purpose of the invention is to increase speed.

Fig. „1 is a circuit diagram of a differential amplifier stage; in fig. 2- equivalent circuit of the output circuit of the current generator, made on the third transistor.

The proposed differential amplifier cascade contains the first 1, second 2 and third 3 transistors, collector loads 4, parallel RL-circuit 5 and resistor 6.

The proposed differential amplifier stage operates as follows.

The device has two inputs for connecting a differential source. If two anti-phase output signals are not required, then one of the collector loads 4 may be absent. In this case, the collector of the corresponding transistor is connected directly to the power bus of the collector circuit. The specificity of the output transistor differential cascades of nanosecond amplifiers is the use of microwave transistors, low load impedance, increased output level, direct connection of the load to the collector circuit, short switching time, and low gain (several units). When amplifying video pulses, the preferred mode of operation of the device is the nonlinear mode, when one of the transistors (first or second) is in the open state, the other in the closed state. The prototype device is characterized by low speed, since at high levels of the output current, the current generator made on the third transistor 3 has a relatively large capacitance of the collector junction. Even use

Modern microwave transistors in the current generator leads to the appearance of the first 1 and second 2 transistors in the emitter circuit, a parasitic capacitance of about 10 pF. The speed of the prototype device is determined by the permissible value of the interference signal. In the case of a given disturbance (for example, 5% of the level of the useful signal), a resistance of the collector load of 50 ohms and a gain factor of 4, the recharge time of the parasitic capacitance in the emitter circuit is 2.5 times. In the proposed device, compensation of said parasitic capacitance occurs. Of the equivalent circuit in FIG. 2 in the case when the frequency dependence of the current generator is neglected, the output resistance of the current generator can be obtained in the following form

 O / RS JR

pLR

Bt x (I / pc k) + R pL + R R + pL + pL + p2LcKR R + pL + pc ,, R2 + p2LckR °

Under the condition сkR L / R, Z ъш R, i.e. The output resistance of the circuit considered does not have a reactive component and, according to its electrical characteristics, this circuit is equivalent to resistor 6. As a result of the compensation of the parasitic capacitance, the proposed device has a higher speed, all other conditions being equal, the switching time does not exceed 1.1 n.

Claims (1)

Invention Formula A differential amplifier stage containing the first and second transistors with loads in the collector circuits and a current generator made on the third transistor, which is so that, in order to improve speed, between the point of connection of the emitters of the first and second transistors and the collector of the third the transistor is connected parallel to the RL circuit, and a resistor is between the collector and the base of the third transistor. Ck I out i-d (p) - 1h FIG. 2