SU1480075A1 - Device for control of reversible thyristor electrical drive - Google Patents

Abstract

The invention relates to electrical engineering and can be used to control direct current electric motors. The aim of the invention is to improve the dynamic characteristics of the drive. The device contains a speed controller 1 with a limit 2 unit, a logical switching unit 3, a timing circuit 4, an operational amplifier 5, a key element 6 and a switch 7 included in the input circuits and the feedback circuit of the amplifier 5. The device minimizes the output voltage At the same time, the amplifier 5 of the current reference circuit in the reference interval of the current-free pause to a level close to zero, almost eliminates the accumulation of error. 1 il.

Description

The invention relates to electrical engineering, in particular to control devices for reversible electric drives, and can find application in electric drives with reversers and valve actuators.

The purpose of the invention is the improvement of dynamic characteristics.

The drawing shows a diagram of a device for controlling a reversible thyristor electric drive.

A device for controlling a reversible thyristor electric drive contains a speed controller 1 with a restriction unit 2 in its feedback circuit, a logical switching unit 3, an adjustable timing RC circuit 4, an operational amplifier 5, a key element 6, a current regulator 7 connected to the output of the operational amplifier 5 , switch 8, logical element And 9, which is part of the logical switching unit 3, additional resistors 10 and 11, the first conclusions of which are connected to the output of the speed controller 1, the second conclusions are connected to the first the outputs of the first and second switches of the switch, the second terminals of which are connected to the zero point of the circuit, the input resistors 12 and 13 of the operational amplifier, the terminals of which are connected to the first terminals of the keys of the switch 8, a feedback resistor 14 'of the operational amplifier, shunted by the key element 6, the control input of which is connected to the input of an adjustable timing circuit 4 and one of the outputs of block 3, the other outputs of which are connected to the control inputs of the keys of the switch 8.

The inputs of the logical unit 3 receive signals to set the speed and current, as well as the current value of the current. The output of the device is the output of the current regulator 7.

The logical switching unit 3 can be performed on combinational-sequential structures and contain two symmetric control channels, each of which contains an activation node, OR, AND-NOT logical elements, the main and additional RS-triggers, as well as a delay time formation unit common to both channels . The outputs of logic block 3 are direct and inverse outputs of the main RS-flip-flops of both channels and logic element 9.

The device operates as follows. ₄

In the initial state of the electric drive, the low-level signals are installed at the direct outputs of the logic unit 3, providing a closed (initial) position of the keys of the switch 8, and at the extra outputs, high-level signals, while at the inputs of the amplifier 6 there are zero potentials, and the key element 6 is open low-level signal from the output of logic element 9.

At the input of the reference of the current controller 7, the signal is zero, the current reference circuit is open.

When, for example, a positive reference signal is supplied (corresponding to the conditional direction of rotation of the electric drive Forward) to the input of the speed controller 1, the logic unit 3 generates a signal that opens the first switch key 8, at the same time a low level signal appears on the corresponding inverse output, which transfers the logic element 9 to the state high level. The beginning is. charge the capacitor of the timing RC circuit 4 and lock the key element 6. In the process of locking the key element 6, the amplifier 5 enters the inverting repeater mode.

Changing the time constant in the circuit, pi 4, you can get the required time and speed of input of the amplifier 5 into the inverting repeater mode.

When reducing the task at the input of the speed controller 1, the voltage at its output changes its sign to the opposite (positive for the case under consideration). In accordance with the well-known algorithm, the logical unit 3 disables the thyristor set Forward and counts down the dead time. Low levels of signals from direct and high levels from the inverse outputs of logic block 3 provide a closed state of the keys of the analog switch 8 and the key element 6.

Thus, at the output of amplifier 5, a voltage close to zero is established, the current reference circuit is open, which eliminates the accumulation of control errors in the current circuit.

The current drop to zero (determined by the sensitivity threshold of the current sensor) leads to the switching of logic block 3 and the inclusion of another set of thyristors (Back). The electric drive goes into braking mode, while the first switch key 8 is closed, and the second is open. The current reference signal is supplied to the non-inverting input of the amplifier 5, which in this case operates in the mode of a non-inverting amplifier with a single transmission coefficient. At the same time, switching at least one of the inverse outputs of logic block 3 leads to the appearance of a high level signal at the output of logic element 9, which is accompanied by a gradual blocking of the key element 6 and an increase in the signal at the output of amplifier 5 (current setting) at a speed determined by the RC timing circuit constant 4. The latter eliminates the dynamic inrush of current when the thyristor kit Back comes into operation.

After the specified disturbance is worked out by the electric drive, the voltage of the current value of the bark reaches the set value, and the sign of the output signal of the speed controller changes. The logical switching unit 3 turns off the thyristor set Back and counts down the dead time, during which the motor current drops to zero. At the same time, the signals from the direct outputs of the logic block 3 provide the initial (closed) polo. the keys of the switch 8, and the signals from the inverted outputs by means of the logic element 9 are the closed state of the key element 6. The current setting circuit is open.

When the motor current reaches the sensitivity threshold of the current sensor, the outputs of the logic unit 3 are switched, the upper switch circuit 8 is opened according to the key circuit, the key element 6 is locked and the current reference signal increases at the output of the amplifier 5. The electric drive returns to the motor mode. The unit gain of the amplifier 5 with inverting and non-inverting switching is provided by the ratios of the resistors,

Block 2 restrictions limits the current at a given level in stationary and transient modes.

Minimizing the output voltage of the amplifier of the current setting circuit at the interval of the dead time pause to a level close to zero virtually eliminates the accumulation of control errors in the current circuit and improves the dynamic characteristics of the electric drive.

Claims (1)

Claim A device for controlling a reversible thyristor electric drive, comprising a speed controller with a block. restrictions in the feedback circuit, current regulator, speed and current sensors, the outputs of which are connected to the feedback inputs of the respective regulators, an adjustable RC timing circuit, a key element whose control input is connected to the midpoint of the adjustable RC timing circuit, the extreme ends of which are connected with a power source and an input of the operational amplifier, input resistors and a feedback resistor of the operational amplifier, shunted by a key element, the output of the operational amplifier is connected to the master by the current controller, a logical switching unit, characterized in that, in order to improve the dynamic characteristics of the electric drive, a switch and two additional resistors are introduced into it, the first terminals of which are connected to the output of the speed controller, and the second 'terminals are connected respectively to the connection point of the first terminals of the first the switch key and the first input resistor and to the connection point of the first terminals of the second switch key, the first terminal of the second input resistor and the non-inverting input of the operating device the amplifier, the second conclusions of the switch keys and the second input resistor are connected to the zero point of the circuit, the control inputs of the switch keys and the key element are connected to the output of the logical switching block.