SU1474868A1 - Sync-pulse selector - Google Patents

Abstract

The invention relates to television. The purpose of the invention is to enhance the functionality and increase noise immunity. The device contains a block 1 run, block 2 time matches, block 3 block, block 4 reset, block 5 division into two, el-OR 6 and 7, el-And 8 and 9 and trigger 10. Enhanced functionality is achieved by making selection and frame and line sync pulses. In order to increase the noise immunity of the device, it uses blocking unit 3, which is designed to prevent false alarms from interferences in unspecified time intervals. 2 hp ff, 1 ill.

Description

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The invention relates to a technique of television and can be used to synchronize personnel with the horizontal scan of various television devices.

The purpose of the invention is to expand the functionality of the device by allocating both frame and line sync pulses, as well as, improving noise immunity.

The drawing shows the structural electrical circuit of the device for the selection of clock pulses,

The device for selecting sync pulses contains a start block 1, a block of 2 time matches, a block 3, a block 4, a reset, a block 5 for dividing into two, the first 6 and second 7 elements OR, the first 8 and second 9 elements AND, and the trigger 10.

Block 1 run contains a trigger 11, the element And 12 and the counter 13.

Block 2 temporal coincidence consists of four elements And 14-17.

Block 3 block contains two trigger 18 and 19 and the element OR 20.

The reset unit 4 includes a trigger 21, an AND element 22 and an OR element 23.

Block 5 division into two contains the trigger 24, the element And 25, the trigger and the element And 27.

The device works as follows.

The input of the trigger 1 comes from the external amplitude selector of the synchro mix of the television signal. The received sync pulse back front sets at the output of the trigger 11 potential 1 and removes the potential discharge from the trigger 21. The potential 1 at the second input of the element

And 12 allows the passage of clock pulses of the external generator to the input of the counter 13.

If the inputs of the element And 17 on the first - 1.

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On the other hand, when a potential difference with p

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1 line sync pulse at the output of the element And 17 is allocated row sync pulse, the duration of which is determined by the appearance of potential 1 at the second input. The selected row pulse passes through the element OR 7 to the output of the device. Dedicated at the output of the element And the 17 line sync pulse sets

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the output of the trigger 24 is potential O. The output of the element OR 7 is the output of the horizontal sync pulses. The potential O at the output of the trigger 24 prohibits the passage of clock pulses through the elements And 8 and 25, and also sets at the output of the trigger 26 potential O. Strong sync pulse

0 from the output of the element AND 17 passes through the element OR 6 to the inverse dynamic input C of the flip-flop 21 and the falling edge sets the output of the flip-flop 21 to the potential 1. This potential through the OR element 23 goes to the R-inputs of the trigger 11, the counter 13 and through the OR element 20 to the R input of the trigger 18 and sets them to the initial state. Element And 22 pre0 is assigned to set the device to its initial state in case of accidental failures.

The selection of equalizing sync pulses is as follows.

5 If at the inputs of the element And 16 the potentials on the first - 1, on the second - O, on the third - 1, and the fourth input of this element receives an equalizing sync pulse,

0 TO at the output of the element AND 16 a pulse is released, the duration of which is determined by the appearance at the second inlet, de element AND 16 of potential 1. Potential 1 at the output of element AND 16 sets a potential O at the output of trigger 9, and a potential 1 at the output of trigger 24 , which permits the passage of pulses through elements AND 8 and 25, and also removes the prohibition of the installation of trigger 26. The equalizing clock pulse from the output of AND 16 passes through the element OR 6 and goes to the first inputs of the elements AND 25 and 27, as well as to the inverse dynamic input C trigger 21. First highlighted The new equalizing impulse through the element 27 does not pass, because at the output of the trigger 26 is a potential O, the same impulse passes through the element 25 and sets a falling front at the output of the trigger 21 potential 1. The next equalizing impulse through the element 27 passes and enters the second input element OR 7, but the rear

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the pulse front resets trigger 26 to potential O at the output.

Isolation of pulses coinciding with the trailing edge of the frame and form

staffing clock is as follows.

If potential 1 is set at the second input of the element 8, then the sync pulses from the television signal synchromixture go through the element 8 of the second input of the element 15 and 15. If the first and fourth inputs of the element 15 have potentials 1 and the third the potential O, then the arrival of the trailing edge at the output of the element And 15 appears pulse, the duration of which is determined by the phenomenon at the third input of the element 15 And the potential 1. The selected pulse arrives at the input S of the trigger 9 and sets at the output of the trigger potential 1 HR sync mpulsa, and the inverse output - O potential that prohibits the passage of the horizontal sync pulse during the vertical sync pulses through AND gate 10 to the output device. The output of the trigger 10 is the output of the device's frame sync pulses, and the output of the device element 8 of the device is connected to an external blocking circuit. The selected pulse from the output of the element AND 15 passes through the element OR 6 and is fed to the input of the reset unit 4 and to the block 5 in the same way as in the case of separation of equalizing clock pulses.

Improving the noise immunity of the device is achieved by connecting the outputs of the counter 13 to the corresponding inputs of the block 2 temporal coincidences as well as using the block 3 block, which is designed to block the third discharge of the counter 13, so that false alarms from interference do not occur at unspecified time intervals. i

Block 3 blocking works as follows.

If, after the start of counter 13 on the element 15, there was no separation of the pulse coinciding with the trailing edge of the tie-in, then if the potentials 1 coincide, the first and second inputs of the element 14 at the output of this element appear potential 1, which is fed to the input S of the trigger 18 and sets at the inverse of the trigger output 18 potential O. This potential prohibits the false selection of interference pulses on the elements 15 and 16. With a difference of 4868 4

of the potential from O to 1 on the seventh section of the counter 13 at the output of the trigger 19 sets the potential 1, which through the element OR 20 enters the input R of the trigger 18 and sets the inverse output of the trigger 18 potential 1, which enters the input R of the trigger 19 and resets

0 it is in the initial state, and also allows the selection of pulses on the element And 16.

If equalizing g chr impulse at the output of the element And 16 is selected, then

5 from the output of the reset unit 4 is fed to the first input of the element OR 20 the potential 1 to reset the trigger 18 to the initial state. If no pulse at the output of the element AND 16 has occurred, then the coincidence of the potentials 1 at the first and second inputs of the element 14 establishes at the inverse output of the trigger 18 potential O.

Claims (3)

1. A device for separating clock pulses, comprising a reset unit, a division unit into two, a first and a second 0 OR elements, the first and second AND elements, a trigger, characterized in that, in order to extend the functionality by selecting both personnel and lines,. sync pulses, a start block, a block of temporal coincidences, the first OR element, a division block by two, the second OR element and the first AND element are inserted in series, The first and second inputs of the start block are respectively the inputs of information and clock signals, the second, third, fourth and fifth outputs are connected to the corresponding with the inputs of the temporal coincidence block, and the fifth, sixth and seventh outputs are connected respectively to the first, second and third inputs of the reset unit, the output of which is connected to the third input of the start block, the first input of the start block is connected to the sixth input of the temporary match block and the first input the second element And, the second input of which is connected to 5 with the second output of the division unit into two, and the output is connected to the seventh input of the temporary coincidence unit, the first and second outputs of which are connected respectively to the first and second 0 the trigger inputs, the first trigger output is the output of the frame sync pulse signal, the second trigger output is connected to the second input of the first element AND whose output is the output of the blocking signal, the second input of the first element AND is connected to the second output of the block of time matches and the second input of the division unit two, the third input of which is connected to the third output of the block of temporal coincidence, with the third input of the first OR element and with the second input of the second OR element, the output of which is the output of the lower-case signal inhroimpulsov, and the output of the first OR gate is connected to a fourth input of the reset unit. 2. Device pop. 1, characterized in that, in order to improve noise immunity, introduced five 0 a block, the first, second and third inputs of which are connected respectively to the output of the reset unit, to the fourth output of the starting block and to the fourth output of the block of temporary coincidence, the eighth input of which is connected to the output of the blocking block, 3. The device according to claim 2, characterized in that the blocking block comprises a first trigger connected in series, an OR element, and a second trigger, the output of which is the output of the blocking block, the first, second and third inputs of which are respectively a second input of the OR element, the first input of the first trigger to the second input of the second trigger, the output of which is connected to the second input of the first trigger, the third input of which is the input of the signal of the logical unit.