SU1469553A1 - Phase automatic frequency control circuit - Google Patents

Abstract

The installation refers to telecommunications. The purpose of the invention is to expand the dynamic range. The device contains a tunable rr 1, a divider 2 frequencies, a phase detector 3, a reference rr 4, a low-pass filter 5, a difference frequency selector 6, a phase analyzer 7, the electro of OR 8 and 9, a reversible counter 10, a phase converter 11 with its control unit (CU) 12, a phase scanning unit (ECF) 13 and a phase scanner (BFR) 14. With detuning exceeding the capture band of the fine-tuning ring, adjusting the frequency of Mr. 1 to Mr. 4 is performed over a coarse frequency tuning channel. The device instantly phases the frequencies of Mr. 4 and the frequency of divider 2, thereby setting the precise control channel in the middle of the hold band without affecting the frequency of Mr. 1. The goal is achieved by synthesizing the period of the frequency supplied to the input of divider 2 in the range relative to the average frequency up to the frequency of r-1 up, and to an arbitrarily small frequency, which is determined by the resolution of the numbers with which the device blocks operate. The accuracy (quantization step) of the synthesized period is determined by the period of the frequency of the following Mr. 1. The device differs by the introduction of the converter 11 with its control unit 12, BSF 13 and BFR 14, given their Il. 6 Il. with $ (L with: IC O) with SP ate Od (D (/.

Description

The invention relates to telecommunications and can be used in synchronization systems, receiving communications equipment, frequency synthesizers, radio measuring devices.

The aim of the invention is to expand the dynamic range.

FIG. Figure 1 shows the structural electrical circuit of the phase locked loop; in fig. 2 - the same, the phase converter of the phase locked loop; in fig. 3 - the same, the phase converter control unit; in fig. 4 - the same, phase sweep unit; in fig. 5 is the same, phase scanning unit; in fig. 6 is a timing diagram of the operation of a phase locked loop device.

The phase locked loop device (Fig. 1) contains a tunable oscillator 1, a frequency divider 2, a phase detector 3, a reference oscillator 4, a low-pass filter 5, a difference frequency selector 6, a phase analyzer 7, the first B and the second 9 elements OR, a reversible counter 10, a phase converter P, a phase converter control unit 12, a phase scanning unit 13, and a phase scan unit 14. Converter P phase (Fig. 2) contains the first 15, the second 16 and the third 17 adders, the first 18, the second 19 and the third 20 registers, the first 21 and the second 22 elements SH. Phase converter control block 12 (Fig. 3) contains an RS flip-flop 23, elements 24-27 coincidence, and a first inverter 28. Phase 13 block 13 (Fig. 5) contains modulo code two 29 and 30, third 31 and the fourth 32 OR elements and the second inverter 33. The phase sweep 14 (FIG. 4) contains counters 34 and 35 with presetting.

The device phase-locked loop works as follows.

With detuning exceeding the frequency locking band of the frequency fine tuning ring, the frequency tuning of the tunable oscillator 1 to the frequency of the reference oscillator 4 is carried out mainly through the coarse frequency tuning channel. The extractor of 6 different frequency frequencies and phase analysis of the 7 generates pulses Frequency more or Frequency less than

These are summed in the reversible counter 10, changing its code depending on the ratio between the pulses from the output of the reference oscillator 4 and the divider 2 frequencies.

At the output of the difference frequency selector 6, the pulses follow with a frequency determined by the difference between the frequencies, and at the output of the phase analyzer 7 with a frequency determined by the magnitude of the current phase increment. These pulses change the code of the reversible counter 10, pass through the elements OR 8 and 9 so that the frequency mismatch between the reference oscillator 4 and the output of the frequency divider 2 decreases.

The code from the output of the reversible counter 10, which is the sum of the pulse sequence from the output of the difference frequency selector 6 and the phase analyzer 7, enters the input of the phase converter 11, the sign bit also goes to the phase converter control unit 1.2. Depending on whether a positive or negative number has been recorded, it is recorded in the phase converter 11 with a pulse, respectively, from the phase scanner unit 14 or from the phase scanner unit 13 via the phase converter control unit 12. The resulting code from the output of the phase converter 11 (output of the second register 19) is fed to the comparison in the phase scanning unit 13 accompanied by a control signal (0.1). the value of which depends on the presence of units in the part of the code bits at the control output of the phase converter 11 (output of the second element OR 22). The input from the phase scanning unit 13 is the code from the phase scanning unit 14. The code bits from counters 34 and 35 are fed respectively to adders 29 and 30 modulo two. When the codes from the phase scanning unit and the converter match, the phase scanning unit 13 outputs a phase code matching pulse generated on the third element IL 31 or a cycle code matching pulse output from the fourth element OR 32. These pulses go to the inputs of the divisor 2 frequencies and a phase converter control unit 12 and on

the first control input of the phase converter 11, resetting the cycle accumulator therein. Depending on the sign bit, the pulses are switched from the reversible counter in the phase converter control unit 12 to the input of the phase converter 11: with a positive sign, from the output of the phase scanning unit 13, and with a negative sign, from the output. block 14 phase scan. According to the phase pulse generated in the phase analyzer 7, the code from the output of the converter 11 phase is overwritten into counters 34, 35 with the preliminary installation of the phase scanner 14. Thereafter, since the codes at the output of the phase converter 11 and the output of the phase-scanning unit 14 become the same, the phase scanning unit 13 produces a pulse at the input of the divider frequency 2.

Thus, there is an instant phasing of the frequencies of the reference oscillator 4 and the frequency from the output of the divider 2 frequencies, and thus setting the exact control channel in the middle of the holdband without affecting the frequency of the tunable oscillator 1, which virtually eliminates the transition process during tuning.

FIG. 6 shows a time diagram of operation of some blocks for cases when the reversible counter 10 produces a positive number of 3, 375 and a negative number of -3.375. The pulse sequence from the tunable generator 1 (FIG. 6) enters the input of the 14 phase sweep.

FIG. 66, c, d, d depicts the output bits of the phase sweep unit 14, in particular, b, c, d - 1, 2, 3rd bit of the phase sweep, d - cycle scan bit; e, g, s, u, k, l, m are the output bits of the 11 phase converter in the addition mode, and e, z, z are bits after the com pute, and, k, l are phase bits, m bit pattern; n, n - rebuilt frequency with addition and subtraction, respectively; o is the average frequency of the range; p, p, s, t, y, f, X - output bits of the 1I phase converter in the subtraction mode

So, in the phase auto-tuning device, the frequency is synthesized

the period of the frequency supplied to the input of the splitter is in the range (with respect to the average frequency) from the frequency of the tunable generator up to arbitrarily small frequency, which is determined by the size of the numbers with which the blocks operate. The accuracy (quantization step) of the synthesized period is determined by the frequency period of the tunable oscillator.

The phase converter is a three-sectional accumulating adder, the first section of which operates after the bits after the second and has no external output (introduced to increase the accuracy of the device), the second (output of the second register 19) - bits of the whole part of the period phase, and a third (output of the second .OR element 22) - by the bits of the cycles (the current phase of the frequency is cyclical O - 360). The input of the accumulating adder receives an additional code from the output of the reversible counter, accompanied by a sign.

A negative number entered at the input of the accumulating adder inhibits the operation of the cycle accumulation section and sets a zero code at its output, and also leads to a decrease in the number at the output of the accumulating adder due to write pulses.

A positive number at the input of the accumulating adder leads to an increase in the number at its output, including the bits from the output of the cycle accumulator, also from the write pulses.

Phase converter control unit 12 switches recording pulses to phase converter 11 from phase scanning unit 13 (when a negative number arrives from the reversing counter 10) or from phase scanner 14 (when a positive number arrives). In addition, it prohibits the passage of any write pulses for the time specified by the loop code, i.e. when the frequency to be produced is less than the average frequency of the range.

The phase sweep unit 14 is connected to the output of the tunable generator 1 and generates a natural number of binary numbers from O to 2 with a period equal to the period of the average frequency of the range. Thus, each binary number at the output of a block of 14 phases is 51469553®

The sweep is also a difference frequency extractor.

phases equal to 360/2 N, where N is equal to (1,2,3, ... 2). In addition, when the resolution signal arrives from the phase converter 11, the phase sweep unit 14 generates a code for the number of cycles 2 imputses each from the tuned JMoro generator 1, i.e. the number of periods of the average frequency F range

and a phase analyzer, the inputs of which are pairwise combined and connected to the inputs of the phase detector, the first and second elements OR, the first inputs of which are connected to the outputs of the difference frequency selector, and the second to the first and second outputs of the phase analyzer 10, and a reversible counter whose inputs are connected to the outputs of the first and second elements OR, respectively, as well as a frequency divider, the output of which is connected to the second input of the phase detector, which is due to the fact that, in order to broaden the dynamic range, hence the connected phase sweep unit.

The frequency received at the cycle account also goes to the phase converter control unit 12 to form a series of write pulses with decreasing frequency. 15

The codes from the output of the phase converter 11 and the phase sweep unit 14 are fed to the inputs of the base scanning unit 13, in which they compare with their coincidence, they generate 20, whose input is connected to the output of a pulse arriving at the input of the tunable generator and the block frequency bodies, as well as to the phase converter control unit 14 for generating recording pulses with increasing frequency.

Thus, since the code sequence from the output of the phase sweep unit cyclically repeats with the middle frequency of the F range, each code value has a strictly fixed place in time and repeats with the same frequency, the Phase Converter, depending on the need to increase or decrease the frequency cyclically There is no code at its output. Thus, the coincidence of the codes in the phase scanning unit, the consequence of which is a pulse at the input of the frequency divider, is shifted along the time axis with respect to the phase sweep cycle, which is an increase or decrease in the period

35

following of these pulses up to the oscillation period of the tunable generator ..

Claims (1)

Phase locked loop device comprising a reference oscillator connected in series, a phase detector, a low pass filter and a tunable oscillator, and phase scanning, the frequency output of which is connected to the input of the frequency divider, as well as the phase converter and the phase converter control unit, while the information inputs of the phase converter and the phase converter control unit are connected to the reversing output 3Q counter, the output of the phase converter is connected to the input of the phase scanner unit and the input of the current phase of the phase scanner unit, the control output of the phase converter is connected to the control inputs of the phase scanner unit and the phase scanner unit, the first, second and third control inputs of the control unit the phase converter is connected respectively to the frequency output of the phase scanning unit, the control output of the phase converter and the control output of the phase scan unit, the first and second control inputs b eye phase converter Con cheny respectively to the control output unit and the scanning phase you move control unit of transducers Lemma phase and the third phase output analyzer is connected to the control input of the frequency divider and phase entry sii- faziosti scanner. 40 45 50 also difference frequency selector and a phase analyzer, the inputs of which are pairwise combined and connected to the inputs of the phase detector, the first and second elements OR, the first inputs of which are connected to the outputs of the difference frequency selector, and the second to the first and second outputs of the phase analyzer, and a reversible counter, the inputs of which are connected to the outputs of the first and second elements OR, respectively, as well as the frequency divider, the output of which is connected to the second input of the phase detector, due to the fact that, in order to broaden the dynamic range, edovatelno connected phase scanner. the input of which is connected to the “output of the tunable generator, and the unit the course of which is connected to the output of the tunable generator, and the unit phase canalization, the frequency output is costly connected to the input of a frequency divider, as well as a phase converter and a phase converter control unit, while the information inputs of the phase converter and phase converter control unit are connected to the reverse output the counter, the output of the phase converter is connected to the input of the installation of the phase scanner unit and the input of the current phase of the phase scanner unit, the control output of the phase converter is connected to the control inputs of the phase scanner unit and the phase scanner unit, the first, second and third control inputs of the converter control unit the phases are connected respectively to the frequency output of the phase scanning unit, to the control output of the phase converter and to the control output of the phase scanning unit, the first and second control inputs of the block The phase converter is connected respectively to the control output of the phase scanning unit and the output of the phase converter control unit, and the third output of the phase analyzer is connected to the control input of the frequency divider and the phase input of the phase scanning unit. Fi.2 Thebes. 7 From 11 From 7 3ff From 11 , 35 ft, f K 12 Shay.5, at 11II1IP1I1PNIP 1IIP1IIII1N111ShTs if LGShLLLSHShPLLLLPShLLPShSh. I XLriJTJTJTJTJTJTnjTJinr eight TJ Lrif U LT -.jjц-у-уц -ц- 1GTG1GPGTPGTGTPGTG FIG. 6