SU1465954A2

SU1465954A2 - Generator of uniformity distributed pseudorandom values

Info

Publication number: SU1465954A2
Application number: SU874210255A
Authority: SU
Inventors: Эдуард Васильевич Борисов; Сергей Николаевич Воробьев; Евгений Сергеевич Егоров
Original assignee: Военная академия им.Ф.Э.Дзержинского
Priority date: 1987-03-16
Filing date: 1987-03-16
Publication date: 1989-03-15

Abstract

Изобретение может быть использовано в импульсной, вычислителтьной и информационно-измерительной технике . Целью изобретени вл етс расширение функциональных возможностей за счет обеспечени возможности формировани псевдослучайных величин с регулируемым законом распределени , в частности с экспоненциальным распределением. Дп достижени поставленной цели в генератор введены блок 16 логарифмировани , блок 17 умножени , блок 18 регистров , арифметические блоки 19, 20 и 21, группы 22, 23 и 24 элементов И, элементы И 25 и 26, блоки 27 и 28 сравнени , блок 29 элементов ИЛИ. Генератор также содержит генераторы 1 и 3 запускающих импульсов, элементы 2.7 и 13 задержки,, элемент ИЛИ 4, триггер 5, генератор 6 тактовых импульсов, счетчик 8 импульсов , первую группу 9 элементов И, блок 10 регистров пам ти, N групп 11 элементов И, N элементов ИСКЛЮЧАОДЕЕ ИЛИ 12. 2 ил. . «о (ЛThe invention can be used in pulse, computing and information-measuring equipment. The aim of the invention is to enhance the functionality by allowing the formation of pseudo-random variables with a controlled distribution law, in particular with an exponential distribution. Dp achieve the goal in the generator entered block 16 logarithm, block 17 multiplication, block 18 registers, arithmetic blocks 19, 20 and 21, groups 22, 23 and 24 elements And, elements And 25 and 26, blocks 27 and 28 comparison, block 29 elements OR. The generator also contains the generators 1 and 3 trigger pulses, delay elements 2.7 and 13, element OR 4, trigger 5, generator 6 clocks, counter 8 pulses, first group 9 elements AND, memory register block 10, N groups 11 elements AND , N elements EXCLUSIVE OR 12. 12 Il. . "O (l

Description

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Claims

Claim

Generator of uniformly distributed pseudorandom variables for 10 ed. St. No. 1202038, characterized in that, in order to expand the functionality by providing the possibility of generating pseudo-random variables 15 with an adjustable distribution law, logarithm unit and multiplication unit, block of registers, three arithmetic 20 blocks, three groups of elements are additionally introduced into it And, two comparison blocks, two AND elements, and an OR element block, the outputs of which are connected to the corresponding inputs of the third arithmetic block, 25 outputs of which are connected to the corresponding E-input multiplier, the outputs of the first group of AND gates connected to the first inputs of the first group of arithmetic Bloch 30 minute, with the fourth group of inputs of the second arithmetic unit, with a first group of inputs of the second comparator and the first group of inputs of the third comparator unit, the second. the group of inputs of which is connected to the first group of outputs of the block of registers, the second group of outputs of which is connected to the fourth group of inputs of the first arithmetic block, the other outputs of which are connected to the group of inputs of the second group of AND elements, the outputs of which are connected to the first group of inputs of the block of OR elements, the second group the inputs of which are connected to the outputs of the third group of elements AND, the group of inputs of which is connected to the second group of inputs of the second arithmetic block, with the fifth group of inputs of the first arithmetic block and the fourth group of outputs of the block of registers, the third group of outputs of which is connected to the first group of inputs of the second arithmetic block, the outputs of which are connected to the group of inputs of the fourth group of AND elements. The outputs of which are connected to the third group of inputs of the block of OR elements, the output of the first generator of triggering pulses is connected to the input the installation of the third arithmetic block and with the input of the installation of the register block, the fifth group of outputs of which is connected to the third group of inputs of the second arithmetic block and to the second load sing inputs of the second comparison unit, the first output of which is connected to the input of the fourth group of elements And, the second output of the second comparison unit is connected to the first input of the first element And and the first input of the second element And, the output of which is connected to the input of the third group of elements And, the second input of the second element And is connected to the first output of the third comparison unit, the second output of which is connected to the second input of the first element And, the output of which is connected to the input of the second group of elements And, the outputs of the memory register are connected to the second group of the inputs of the first arithmetic block, the outputs of the N elements EXCLUSIVE OR are connected to the corresponding inputs of the logarithm unit.

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