SU1444765A1 - Arrangement for distributing tasks among electronic computers - Google Patents

Abstract

The invention relates to the field of computer technology and can be used in the construction of computer complexes as a device for distributing tasks between individual computer complexes. The goal of the invention is to expand the field of application of the device due to the possibility of assigning tasks to an arbitrary number of computers. A device for distributing tasks between computers contains N channels, in each K-m canape. - the counter, the first and second blocks of elements AND, the first, second and third elements OR, the first and second elements AND, the element OR-NOT, and in addition, the element IL-NOT, element I. The device organizes in each channel the calculation of the difference of tasks, located in this computer and computer with the least number of tasks. With such a functioning discipline, the principle of the distribution of tasks U among computers is simplified and it is possible to increase the number of channels without a significant increase in equipment, 2 sludge. cl

Description

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t. 1 The invention relates to computing technology. It can be used in the construction of computer complexes as devices for distributing tasks between individual computer complexes.

The purpose of the invention is to expand the field of application of the device due to the possibility of assigning tasks to an arbitrary number of computers.

FIG. 1 shows a functional diagram of the proposed device;

Assume that in all channels except the N-ro, the counters are not in the zero state. Then the code of the next task on the clock pulse from input 14 enters the channel, with the result that at the output of the YLIN element of FIG. 2 is a timing diagram of the operation of the device. J5 NOT 10.N a zero signal appears.

The device contains N channels 1.1-on all inputs of the element OR-NOT 11 - 1.N and in each K-th channel counter zero signals, and at its output - 2; K, blocks of elements I Z. K and 4. K, ele - a single signal that permits the passage of cops OR Z.K., 6.K and 7.K, elements AND pulse, from the input 15 through the element

20 and 12 and elements OR 6.1 - 6.N on

subtractive inputs counters 2.1 - 2.N.

8.K and 9.K, an element OR-IS 10.K and, moreover, an element OR-NOT 11, elements AND 12, informational input 13 of the device, the first 14, the second 15, the third 16 and the fourth 17 sync. channels appear, the counters of which are in the zero state. Therefore, the next task

0

enters the second computer and the inputs of the element OR 5.2.

Similarly, as in the first channel, at the output of the element OR-NOT 10.2 on c-. There is a zero signal, as a result of which the code of the next task goes to the third computer, etc.

Assume that in all channels except the N-ro, the counters are not in the zero state. Then the code of the next task on the clock pulse from the input 14 enters the channel, as a result of which the output signal of YLI5 NOT 10.N appears a zero signal.

Thus, channels appear whose counters are in the zero state. Therefore, the next task

the rushing inputs, the signal inputs 18.1-25 from input 13 enters one of these

18.N devices and information outputs 19.1 - 19.N devices.

The device works as follows.

In the initial state, the counters 2.1 through 2.N are in the zero state. At all outputs of the counters - zero signals, which causes the issuance of single signals, at the outputs of the elements OR NOT 10.1 - 10.N. The circuit for setting the circuit elements to the initial state in FIG. 1 conventionally not shown.

A single signal from the output of the element OR NOT 10.1 opens the block of elements AND 3.1 and closes the block of elements AND 4.1, as a result of which the task code, received at information input 13, enters through the open block, elements 3.1 3.1 by synchronizing from input 13 - moves 19.1 in the first channel computer. In addition, at the output of the OR 5.1 element, a single signal appears, which through the OR 7.1 7.1 element is fed to the summing input of the counter 2.1. As a result, at the output of the element OR NOT 10.1, a zero signal appears, the opening block of AND 4.1 elements and the closing block of AND 3.1 elements. Thus, the next task code from input 13 is through the open block of elements AND 4.1 and the block of elements AND 3.2.

thirty

40

channels. This case is illustrated in figure 2.a.

Consider the operation of the device in various cases where the inputs 18.1 to 18.N receive signals that a computer has completed one of the tasks.

Let.the computer of the second channel receive a signal, signaling to the input 18.2 that the computer has completed one of the tasks, and the minimum number of tasks was solved in this computer, i.e. counter 2.2 is in the zero state. Obviously, in this case, the contents of all counters, except 2.2, must be increased by one, since the difference in the number of tasks in all computers with a computer that has the least number of tasks has changed.

The device in this case (figb) works as follows. A single signal from input 18.2 opens And 8.2 and And 9.2 elements. The next impulse from the input 16 arrives at the output of the AND 8.2 element, since a single signal comes from the output of the OR-NOT 10.2 element. The pulse from the output of the element OR 7.1 to 7.N goes to the summing inputs of counters 2.1 .N of all channels, added to their contents one, but the next pulse from the input 17 goes through the open element AND 9.2 and the element OR 6.2 to the subtracting input of the counter only 2.2, resulting in 45

50

55

0

0

channels. This case is illustrated in figure 2.a.

Consider the operation of the device in various cases where the inputs 18.1 - 18.N receive signals that a computer has completed one of the tasks.

Let.the computer of the second channel receive a signal, signaling to the input 18.2 that the computer has completed one of the tasks, and the minimum number of tasks was solved in this computer, i.e. counter 2.2 is in the zero state. Obviously, in this case, the contents of all counters except 2.2 ,. it is necessary to increase by one, since the difference in the number of tasks in all computers with a computer that has the least number of tasks has changed.

The device in this case (figb) works as follows. A single signal from input 18.2 opens And 8.2 and And 9.2 elements. The next impulse from the input 16 arrives at the output of the AND 8.2 element, since a single signal comes from the output of the OR-NOT 10.2 element. The pulse from the output of the element OR 7.1 to 7.N goes to the summing inputs of counters 2.1 .N of all channels, added to their contents one, but the next pulse from the input 17 goes through the open element AND 9.2 and the element OR 6.2 to the subtracting input of the counter only 2.2, resulting in a 5

0

five

J1444765

The counter of all channels except counter 2.2 is added one at a time, and counter 2.2 remains in the same position.

Consider the case when the signal about the implementation of the next task came from the computer, which did not contain the minimum number of tasks. This case is shown in figv. Obviously, IQ that in this case it is only necessary to subtract one from the counter 2 of this computer. It happens as follows. Let the signal arrive at the input 18.N. Then the impulse from the input 16 does not send a pit to the code of the element AND 8.-N, since it is closed by a zero signal from the output of the element OR NOT HE 10.N. 11pulse from input 17 enters through the open element AND 9.N and the element OR 6.N on you-. 2o read the 2.N counter input, thereby bringing it closer. contents to the contents of the channel counter, whose computer solves the least number of tasks.

Consider the case of simultaneous arrival of signals from a computer containing a minimum number of tasks and a computer that does not contain a minimum number of tasks (Fig. 2d).

Let signals be inputted to inputs 18.1 and 18.2, and the minimum number of tasks in the computer of the first channel;

In this case, the contents of counters 2.1 and 2.2 should be left unchanged, since in counter 2.1 there should remain O, indicating the minimum number of tasks, while in the second channel EOM the difference in the number of tasks did not change as compared to the first channel computer. The contents of all other 2.3-2.N counters must be increased by one.

Since AND 8.1 will be opened, the impulse from post 16 will go through the elements OR 7.1-7.N to the summing inputs of all counters 2.1-2.N, but the impulse from input 17 will go through the open elements AND 9.1 and 9.2 and the elements OR 6.1 and 6.2 on the subtracted35

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dlnv n eltsi with

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l in the channel of kyla you IL karoty el with bli with iLi h no more. before . you and si

The meter inputs are valid.

2.1 and 2.2, respectively, the pulses at inputs 14 - 17 have the same period, but are shifted in phase so that the pulse at input 14 is followed by a pulse at input 15, then a pulse at input 16 and then a pulse at input 17.

The arrival of information at inputs 13 and 18.1 to 18. N is synchronized by pulses from inputs 14 to 17. The task code cannot appear between the pulses at input 14 and 15 and must be held until the end of the pulse at input 15,. but its duration should not exceed one period.

The signals at inputs 18.1 to 18.N cannot appear between the pulses from inputs 16 and 17 and should be held until the end of the pulse from input 17, but their duration should not exceed one period.

Claims (1)

Invention Formula A device for distributing tasks between computers, containing three channels, each of which contains the first block of AND elements, the first OR element, the first AND element and the counterj, in each channel the input of the AND element block is an information output of the device channel and is connected to the inputs of the OR element channel, the information input of the device is connected to the first input of the first block of elements AND of the first channel, which is different in that, in order to broaden the view 35 40 45 50 55 the application of the device due to the possibility of assigning jobs to an arbitrary number of computers, it contains the element AND, the element OR NOT and (N-3) channels (N is the number of computers), the fourth to N channels contain the first block of elements AND, the first the element OR, the first element AND and the counter, and the channels from the first to the Nth contain the second block of elements AND, the second and third elements OR, the second element AND, the RSHI-NOT element, while in the channels from the fourth to the Nth output of the first the block of elements And is the information output channel of the device and is connected to the input of the first element OR, in each channel of the device, the output of the first element OR is connected to the first input of the second element SH, the output of which is connected to the summing input of the counter, the outputs of which are connected to the inputs of the element YALI-NOT, whose code is connected to the second input of the first block of elements And, by the first input of the second block of elements And and the first input of the first element And, the signal input of the channel of the device is connected to the second input of the first ffS- And the first input of the second element And, the output of which is connected to the first input of the third element OR, the output of which is connected to the subtractive input of the counter, the code of the second block of elements AND the Mth channel - (K., N-1) is connected to the first input The first block of elements And the second input of the second block of elements And (M + 1) -th channel, the first clock input of the device is connected to the third inputs of the first blocks of elements And all channels, the second clock input with the third inputs of the first elements And all channels, the third clock entrance - with the second input ten 15 Dami of the second elements And Bcejj channels, the fourth clock input - with the first input of the element AND, whose input is connected to the second inputs of the third elements OR of all channels, the information input of the device is connected to the second input of the second block of elements And the first channel, the output of the element OR NOT K-th channel (, N) is connected to the K-th input of the element OR NOT, the output of which is connected to the second input of the element AND, the output of the first element AND of the K-th channel is connected to the (K + 1) -th inputs of the second OR elements of all channels.